The TLV70018-Q1 and TLV70012-Q1 use a PMOS pass transistor to achieve low dropout. When (V_IN – V_OUT) is less than the dropout voltage (V_DO), the PMOS pass transistor is in the linear region of operation and the input-to-output resistance is the R_DS(ON) of the PMOS pass transistor. V_DO scales approximately with output current because the PMOS transistor behaves as a resistor in dropout.

As with any linear regulator, PSRR and transient response are degraded as (V_IN – V_OUT) approaches dropout. Figure 5-11 illustrates this effect.