ZHCSFK1C July 2016 – June 2018
PRODUCTION DATA.
When laying out the board for the TLV700xx-Q1, the board is recommended to be designed with separate ground planes for VIN and VOUT that are only connected at the GND pin of the device, as shown in Figure 24. Also, the ground connection for the bypass capacitor must be connected directly to the GND pin of the device. Improve the PSRR performance of the TLV700xx-Q1 by following these layout guidelines.