ZHCSBE7D August   2013  – July 2019 TLV702-Q1

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      典型应用
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Internal Current Limit
      2. 7.3.2 Shutdown
      3. 7.3.3 Dropout Voltage
      4. 7.3.4 Undervoltage Lockout
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input and Output Capacitor Requirements
        2. 8.2.2.2 Transient Response
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
    1. 9.1 Power Dissipation
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Thermal Consideration
      2. 10.1.2 Package Mounting
    2. 10.2 Layout Examples
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 开发支持
        1. 11.1.1.1 Spice 模型
      2. 11.1.2 器件命名规则
    2. 11.2 文档支持
      1. 11.2.1 相关文档
    3. 11.3 接收文档更新通知
    4. 11.4 社区资源
    5. 11.5 商标
    6. 11.6 静电放电警告
    7. 11.7 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6.6 Typical Characteristics

Over operating temperature range (TJ = –40°C to +125°C), VIN = VOUT(nom) + 0.5 V or 2 V, whichever is greater; IOUT = 10 mA, VEN = VIN, COUT = 1 μF, unless otherwise noted. Typical values are at TJ = 25°C.
TLV702-Q1 tc_line_reg_10ma_lvsag6.gif
Figure 1. Line Regulation
TLV702-Q1 tc_load_reg_lvsag6.gif
Figure 3. Load Regulation
TLV702-Q1 tc_vdo_iout_lvsag6.gif
Figure 5. Dropout Voltage vs Output Current
TLV702-Q1 tc_ignd_vin_lvsag6.gif
Figure 7. Ground Pin Current vs Input Voltage
TLV702-Q1 tc_ignd-tmp_lvsag6.gif
Figure 9. Ground Pin Current vs Temperature
TLV702-Q1 tc_ilim-vin_lvsag6.gif
Figure 11. Current Limit vs Input Voltage
TLV702-Q1 tc_psrr-vin_lvsag6.gif
Figure 13. Power-Supply Ripple Rejection vs Input Voltage
TLV702-Q1 tc_load_tran_200_lvsag6.gif
Figure 15. Load Transient Response
TLV702-Q1 tc_load_tran_50_lvsag6.gif
Figure 17. Load Transient Response
TLV702-Q1 tc_line_tran_300ma_lvsag6.gif
Figure 19. Line Transient Response
TLV702-Q1 tc_line_tran_55v_lvsag6.gif
Figure 21. Line Transient Response
TLV702-Q1 tc_line_reg_300ma_lvsag6.gif
Figure 2. Line Regulation
TLV702-Q1 tc_vdo_vin_lvsag6.gif
Figure 4. Dropout Voltage vs Input Voltage
TLV702-Q1 tc_vout-tmp_lvsag6.gif
Figure 6. Output Voltage vs Temperature
TLV702-Q1 tc_ignd_iout_lvsag6.gif
Figure 8. Ground Pin Current vs Load
TLV702-Q1 tc_ishdn-vin_lvsag6.gif
Figure 10. Shutdown Current vs Input Voltage
TLV702-Q1 tc_psrr_fqcy_05v_lvsa00.gif
Figure 12. Power-Supply Ripple Rejection vs Frequency
TLV702-Q1 tc_noise-frq_lvsag6.gif
Figure 14. Output Spectral Noise Density vs Frequency
TLV702-Q1 tc_load_tran_10_lvsag6.gif
Figure 16. Load Transient Response
TLV702-Q1 tc_load_tran_300_lvsag6.gif
Figure 18. Load Transient Response
TLV702-Q1 tc_line_tran_1ma_lvsag6.gif
Figure 20. Line Transient Response
TLV702-Q1 tc_ramp_up_down_lvsag6.gif
Figure 22. VIN Ramp Up, Ramp Down Response
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