ZHCSI89D
November 2017 – September 2024
TLV755P
PRODUCTION DATA
1
1
特性
2
应用
3
说明
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Undervoltage Lockout (UVLO)
6.3.2
Enable (EN)
6.3.3
Internal Foldback Current Limit
6.3.4
Thermal Shutdown
6.4
Device Functional Modes
6.4.1
Normal Operation
6.4.2
Dropout Operation
6.4.3
Disabled
7
Application and Implementation
7.1
Application Information
7.1.1
Input and Output Capacitor Selection
7.1.2
Dropout Voltage
7.1.3
Exiting Dropout
7.1.4
Reverse Current
7.1.5
Power Dissipation (PD)
7.1.5.1
Estimating Junction Temperature
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
Input Current
7.2.2.2
Thermal Dissipation
7.2.3
Application Curve
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Examples
8
Device and Documentation Support
8.1
Device Support
8.1.1
Device Nomenclature
8.2
接收文档更新通知
8.3
支持资源
8.4
Trademarks
8.5
静电放电警告
8.6
术语表
9
Revision History
10
Mechanical, Packaging, and Orderable Information
封装选项
请参考 PDF 数据表获取器件具体的封装图。
机械数据 (封装 | 引脚)
DYD|5
DBV|5
DQN|4
DRV|6
散热焊盘机械数据 (封装 | 引脚)
DRV|6
QFND087M
DQN|4
QFND355C
订购信息
zhcsi89d_oa
zhcsi89d_pm
7.2.3
Application Curve
V
IN
= 4.3V, V
OUT
= 3.3V
Figure 7-5
PSRR vs Frequency (4.3V to 3.3V)
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