9.2.1.2.3 Output Voltage and Logic Input Level

In order for TLVH431B-EP to properly be used as a comparator, the logic output must be readable by the receiving logic device. This is accomplished by knowing the input high and low level threshold voltage levels, typically denoted by V_IH and V_IL.

As shown in Figure 30 and Figure 31, TLVH431B-EP's output low level voltage in open-loop/comparator mode is approximately 1 V, which is sufficient for some 3.3-V supplied logic. However, would not work for 2.5-V and 1.8-V supplied logic. To accommodate this a resistive divider can be tied to the output to attenuate the output voltage to a voltage legible to the receiving low-voltage logic device.

TLVH431B-EP's output high voltage is approximately V_SUP due to TLVH431B-EP being open-collector. If V_SUP is much higher than the receiving logic's maximum input voltage tolerance, the output must be attenuated to accommodate the outgoing logic's reliability.

When using a resistive divider on the output, be sure to make the sum of the resistive divider (R1 and R2 in Figure 29) is much greater than R_SUP in order to not interfere with TLVH431B-EP's ability to pull close to V_SUP when turning off.