ZHCSQY7 september 2022 TMAG5173-Q1
ADVANCE INFORMATION
The TMAG5173-Q1 supports optional CRC during I2C read. The CRC can be enabled through the CRC_EN register bit. The CRC is performed on a data string that is determined by the I2C read type. The CRC information is sent as a single byte after the data bytes. The code is generated by the polynomial x8 + x2 + x + 1. Initial CRC bits are FFh.
The following equations can be employed to calculate CRC:
The following examples show calculated CRC byte based off various input data:
I2C Data 00h : CRC = F3h
I2C Data FFh : CRC = 00h
I2C Data 80h : CRC = 7Ah
I2C Data 4Ch : CRC = 10h
I2C Data E0h : CRC = 5Dh
I2C Data 00000000h : CRC = D1h
I2C Data FFFFFFFFh : CRC = 0Fh