ZHCSQY7 september   2022 TMAG5173-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Temperature Sensor
    7. 6.7  Magnetic Characteristics For A1
    8. 6.8  Magnetic Characteristics For A2
    9. 6.9  Magnetic Temp Compensation Characteristics
    10. 6.10 I2C Interface Timing
    11. 6.11 Power up Timing
    12. 6.12 Typical Characteristics
  8. 7 详细说明
    1. 7.1 概述
    2. 7.2 功能方框图
    3. 7.3 Feature Description
      1. 7.3.1 磁通量方向
      2. 7.3.2 Sensor Location
      3. 7.3.3 Interrupt Function
      4. 7.3.4 Device I2C Address
      5. 7.3.5 Magnetic Range Selection
      6. 7.3.6 Update Rate Settings
    4. 7.4 Device Functional Modes
      1. 7.4.1 Standby (Trigger) Mode
      2. 7.4.2 Sleep Mode
      3. 7.4.3 Wake-up and Sleep (W&S) Mode
      4. 7.4.4 Continuous Measure Mode
    5. 7.5 Programming
      1. 7.5.1 I2C 接口
        1. 7.5.1.1 SCL
        2. 7.5.1.2 SDA
        3. 7.5.1.3 I2C Read/Write
          1. 7.5.1.3.1 标准 I2C 写入
          2. 7.5.1.3.2 通用广播写入
          3. 7.5.1.3.3 Standard 3-Byte I2C Read
          4. 7.5.1.3.4 1-Byte I2C Read Command for 16-Bit Data
          5. 7.5.1.3.5 1-Byte I2C Read Command for 8-Bit Data
          6. 7.5.1.3.6 I2C Read CRC
      2. 7.5.2 数据定义
        1. 7.5.2.1 磁传感器数据
        2. 7.5.2.2 Temperature Sensor Data
        3. 7.5.2.3 Angle and Magnitude Data Definition
        4. 7.5.2.4 Magnetic Sensor Offset Correction
    6. 7.6 TMAG5173 Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Select the Sensitivity Option
      2. 8.1.2 Temperature Compensation for Magnets
      3. 8.1.3 Sensor Conversion
        1. 8.1.3.1 Continuous Conversion
        2. 8.1.3.2 Trigger Conversion
        3. 8.1.3.3 Pseudo-Simultaneous Sampling
      4. 8.1.4 Magnetic Limit Check
      5. 8.1.5 Error Calculation During Linear Measurement
      6. 8.1.6 Error Calculation During Angular Measurement
    2. 8.2 Typical Applications
      1. 8.2.1 I2C Address Expansion
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
      2. 8.2.2 Angle Measurement
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
          1. 8.2.2.2.1 Gain Adjustment for Angle Measurement
        3. 8.2.2.3 Application Curves
    3. 8.3 What to Do and What Not to Do
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 文档支持
      1. 9.1.1 Related Documentation
    2. 9.2 接收文档更新通知
    3. 9.3 支持资源
    4. 9.4 商标
    5. 9.5 静电放电警告
    6. 9.6 术语表
  11. 10机械、封装和可订购信息
    1. 10.1 Package Option Addendum
    2. 10.2 Tape and Reel Information

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6.10 I2C Interface Timing

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
I2C Interface Fast Mode Plus
fI2C_fmp I2C clock (SCL) frequency LOAD = 50 pF 1000 KHz
twhigh_fmp High time: SCL logic high time duration 350 ns
twlo_wfmp Low time: SCL logic low time duration 500 ns
tsu_cs_fmp SDA data setup time 50 ns
th_cs_fmp SDA data hold time 120 ns
ticr_fmp SDA, SCL input rise time 120 ns
ticf_fmp SDA, SCL input fall time 55 ns
th_ST_fmp Start condition hold time 0.1 µs
tsu_SR_fmp Repeated start condition setup time 0.1 µs
tsu_SP_fmp Stop condition setup time 0.1 µs
tw_SP_SR_fmp Bus free time between stop and start condition 0.2 µs
I2C Interface Fast Mode
fI2C I2C clock (SCL) frequency LOAD = 50 pF 400 KHz
twhigh High time: SCL logic high time duration 600 ns
twlow Low time: SCL logic low time duration 1300 ns
tsu_cs SDA data setup time 100 ns
th_cs SDA data hold time 0 ns
ticr SDA, SCL input rise time 300 ns
ticf SDA, SCL input fall time 300 ns
th_ST Start condition hold time 0.3 µs
tsu_SR Repeated start condition setup time 0.3 µs
tsu_SP Stop condition setup time 0.3 µs
tw_SP_SR Bus free time between stop and start condition 0.6 µs
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