The device core logic is split up into multiple virtual power domains to optimize the power for a given application use case.

This device has six logic power domains : PD1, PD2, PD3, PD4, PD5, and PD6. PD1 is a domain which cannot turn off of its clocks at once through the Power-Management Module (PMM). However, individual clock domain operating in PD1 can be individually enabled or disabled through the SYS.CDDIS register. Each of the other power domains can be turned ON, IDLE or OFF as per the application requirement through the PMM module.

In this device, a power domain can operate in one of the three possible power states: ON, IDLE and OFF. ON state is the normal operating state where clocks are actively running in the power domain. When clocks are turned off, the dynamic current is removed from the power domain. In this device, both the IDLE and OFF states have the same power characteristic. When put into either the IDLE or the OFF state, only clocks are turned off from the power domain. Leakage current from the power domain still remains. Note that putting a power domain in the OFF state will not remove any leakage current in this device. In changing the power domain states, the user must poll the system status register to check the completion of the transition. From a programmer model perspective, all three power states are available from the PMM module.

The actual management of the power domains and the hand-shaking mechanism is managed by the PMM. Refer to the Power Management Module (PMM) chapter of the device technical reference manual for more details.