4.3.1 Notes on Output Multiplexing

Table 4-17 shows the output signal multiplexing and control signals for selecting the desired functionality for each pin.

• The pins default to the signal defined by the DEFAULT FUNCTION column in Table 4-17
• The CONTROL 1, CONTROL 2, and CONTROL 3 columns indicate the multiplexing control register and the bit that must be set in order to select the corresponding functionality to be output on any particular pin.

For example, consider the multiplexing on pin 18, shown in Table 4-18 .

Table 4-17 Output Mux Options

100 PZ PIN	DEFAULT FUNCTION	CONTROL 1	OPTION2	CONTROL 2	OPTION 3	CONTROL 3
1	GIOA[0]	PINMMR0[8]	SPI3nCS[3]	PINMMR0[9]	–	–
2	GIOA[1]	PINMMR1[0]	SPI3nCS[2]	PINMMR1[1]	–	–
5	GIOA[2]	PINMMR1[8]	SPI3nCS[1]	PINMMR1[9]	–	–
8	GIOA[3]	PINMMR1[16]	SPI2nCS[3]	PINMMR1[17]	–	–
9	GIOA[4]	PINMMR1[24]	SPI2nCS[2]	PINMMR1[25]	–	–
10	GIOA[5]	PINMMR2[0]	EXTCLKIN	PINMMR2[1]	–	–
12	GIOA[6]	PINMMR2[8]	SPI2nCS[1]	PINMMR2[9]	N2HET[31]	PINMMR2[10]
18	GIOA[7]	PINMMR2[16]	N2HET[29]	PINMMR2[17]	–	–
93	MIBSPI1nCS[1]	PINMMR6[8]	EQEPS	PINMMR6[9]	N2HET[17]	PINMMR6[10]
27	MIBSPI1nCS[2]	PINMMR3[0]	N2HET[20]	PINMMR3[1]	N2HET[19]	PINMMR3[2]
39	MIBSPI1nCS[3]	PINMMR4[8]	N2HET[26]	PINMMR4[9]	–	–
68	MIBSPI1nENA	PINMMR5[8]	N2HET[23]	PINMMR5[9]	N2HET[30]	PINMMR5[10]
36	SPI3CLK	PINMMR3[16]	EQEPA	PINMMR3[17]	–	–
38	SPI3nCS[0]	PINMMR4[0]	EQEPI	PINMMR4[1]	–	–
37	SPI3nENA	PINMMR3[24]	EQEPB	PINMMR3[25]	–	–
58	ADEVT	PINMMR4[16]	N2HET[28]	PINMMR4[17]	–	–

Table 4-18 Muxing Example

100 PZ PIN	DEFAULT FUNCTION	CONTROL 1	OPTION2	CONTROL 2	OPTION 3	CONTROL 3
18	GIOA[7]	PINMMR2[16]	N2HET[29]	PINMMR2[17]	–	–

• When GIOA[7] is configured as an output pin in the GPIO module control register, then the programmed output level appears on pin 18 by default. The PINMMR2[16] bit is set by default to indicate that the GIOA[7] signal is selected to be output.
• If the application must output the N2HET[29] signal on pin 18, it must clear PINMMR2[16] and set PINMMR2[17].
• The pin is connected as input to both the GPIO and N2HET modules. That is, there is no input multiplexing on this pin.