6 Pin Configuration and Functions

Figure 6-1 TMUX1308-Q1: PW Package,16-Pin TSSOP(Top View)

Figure 6-2 TMUX1308-Q1: DYY Package,16-Pin SOT-23-THIN(Top View)

Figure 6-3 TMUX1308-Q1: BQB Package,16-Pin WQFN(Top View)

Table 6-1 Pin Functions TMUX1308-Q1

PIN		TYPE⁽¹⁾	DESCRIPTION⁽²⁾
NAME	NO.	TYPE⁽¹⁾	DESCRIPTION⁽²⁾
S4	1	I/O	Source pin 4. Signal path can be an input or output.
S6	2	I/O	Source pin 6. Signal path can be an input or output.
D	3	I/O	Drain pin (common). Signal path can be an input or output.
S7	4	I/O	Source pin 7. Signal path can be an input or output.
S5	5	I/O	Source pin 5. Signal path can be an input or output.
EN	6	I	Active low logic input. When this pin is high, all switches are turned off. When this pin is low, the A[2:0] address inputs determine which switch is turned on as listed in Table 9-1.
N.C.	7	Not Connected	Not internally connected.
GND	8	P	Ground (0 V) reference
A2	9	I	Address line 2. Controls the switch configuration as listed in Table 9-1.
A1	10	I	Address line 1. Controls the switch configuration as listed in Table 9-1.
A0	11	I	Address line 0. Controls the switch configuration as listed in Table 9-1.
S3	12	I/O	Source pin 3. Signal path can be an input or output.
S0	13	I/O	Source pin 0. Signal path can be an input or output.
S1	14	I/O	Source pin 1. Signal path can be an input or output.
S2	15	I/O	Source pin 2. Signal path can be an input or output.
VDD	16	P	Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between V_DD and GND.
Thermal pad		—	Exposed thermal pad with conductive die attached. No requirement to solder this pad. If connected, then it should be left floating or tied to GND.

(1) I = input, O = output, I/O = input and output, P = power.

(2) For what to do with unused pins, refer to Section 9.4.

Figure 6-4 TMUX1309-Q1: PW Package,16-Pin TSSOP(Top View)

Figure 6-5 TMUX1309-Q1: DYY Package,16-Pin SOT-23-THIN(Top View)

Figure 6-6 TMUX1309-Q1: BQB Package,16-Pin WQFN(Top View)

Table 6-2 Pin Functions TMUX1309-Q1

PIN		TYPE⁽¹⁾	DESCRIPTION⁽²⁾
NAME	NO.	TYPE⁽¹⁾	DESCRIPTION⁽²⁾
S0B	1	I/O	Source pin 0 of mux B. Can be an input or output.
S2B	2	I/O	Source pin 2 of mux B. Can be an input or output.
DB	3	I/O	Drain pin (Common) of mux B. Can be an input or output.
S3B	4	I/O	Source pin 3 of mux B. Can be an input or output.
S1B	5	I/O	Source pin 1 of mux B. Can be an input or output.
EN	6	I	Active low logic input. When this pin is high, all switches are turned off. When this pin is low, the A[1:0] address inputs determine which switch is turned on.
N.C.	7	Not Connected	Not internally connected.
GND	8	P	Ground (0 V) reference
A1	9	I	Address line 1. Controls the switch configuration as listed in Table 9-2.
A0	10	I	Address line 0. Controls the switch configuration as listed in Table 9-2.
S3A	11	I/O	Source pin 3 of mux A. Can be an input or output.
S0A	12	I/O	Source pin 0 of mux A. Can be an input or output.
DA	13	I/O	Drain pin (Common) of mux A. Can be an input or output.
S1A	14	I/O	Source pin 1 of mux A. Can be an input or output.
S2A	15	I/O	Source pin 2 of mux A. Can be an input or output.
VDD	16	P	Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between V_DD and GND.
Thermal pad		—	Exposed thermal pad with conductive die attached. No requirement to solder this pad. If connected, then it should be left floating or tied to GND.

(1) I = input, O = output, I/O = input and output, P = power.

(2) For what to do with unused pins, refer to Section 9.4.