The TMUX6121 is implemented with simple transmission gate topology, as shown in Figure 8-13. Any mismatch in the stray capacitance associated with the NMOS and PMOS causes an output level change whenever the switch is opened or closed.

Figure 8-13 Transmission Gate Topology

The devices utilize special charge-injection cancellation circuitry that reduces the source (Sx)-to-drain (Dx) charge injection to as low as 0.51 pC at VS = 0 V, as shown in Figure 8-14.

Figure 8-14 Source-to-Drain Charge Injection vs Source or Drain Voltage