ZHCSNF7G February   2021  – July 2024 TMUX7234

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Thermal Information
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Source or Drain Continuous Current
    6. 5.6  ±15 V Dual Supply: Electrical Characteristics 
    7. 5.7  ±15 V Dual Supply: Switching Characteristics 
    8. 5.8  ±20 V Dual Supply: Electrical Characteristics
    9. 5.9  ±20 V Dual Supply: Switching Characteristics
    10. 5.10 44 V Single Supply: Electrical Characteristics 
    11. 5.11 44 V Single Supply: Switching Characteristics 
    12. 5.12 12 V Single Supply: Electrical Characteristics 
    13. 5.13 12 V Single Supply: Switching Characteristics 
    14. 5.14 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1  On-Resistance
    2. 6.2  Off-Leakage Current
    3. 6.3  On-Leakage Current
    4. 6.4  Transition Time
    5. 6.5  tON(EN) and tOFF(EN)
    6. 6.6  Break-Before-Make
    7. 6.7  tON (VDD) Time
    8. 6.8  Propagation Delay
    9. 6.9  Charge Injection
    10. 6.10 Off Isolation
    11. 6.11 Crosstalk
    12. 6.12 Bandwidth
    13. 6.13 THD + Noise
    14. 6.14 Power Supply Rejection Ratio (PSRR)
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Bidirectional Operation
      2. 7.3.2 Rail-to-Rail Operation
      3. 7.3.3 1.8 V Logic Compatible Inputs
      4. 7.3.4 Fail-Safe Logic
      5. 7.3.5 Latch-Up Immune
      6. 7.3.6 Ultra-Low Charge Injection
    4. 7.4 Device Functional Modes
    5. 7.5 Truth Tables
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 支持资源
    4. 11.4 Trademarks
    5. 11.5 静电放电警告
    6. 11.6 术语表
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

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机械数据 (封装 | 引脚)
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订购信息

4 Pin Configuration and Functions

TMUX7234 TMUX7234 PW Package, 20-Pin TSSOP (Top View)Figure 4-1 TMUX7234 PW Package, 20-Pin TSSOP (Top View)
TMUX7234 TMUX7234 RRQ Package, 20-Pin WQFN (Top View)Figure 4-2 TMUX7234 RRQ Package, 20-Pin WQFN (Top View)
Table 4-1 Pin Functions TMUX7234
PIN TYPE(1) DESCRIPTION(2)
NAME PW NO. RRQ NO.
SEL1 1 19 I Logic control input 1; has internal pull-down resistor. Controls switch 1 (see Section 7.5).
S1A 2 20 I/O Source pin 1A. Can be an input or output.
D1 3 1 I/O Drain pin 1. Can be an input or output.
S1B 4 2 I/O Source pin 1B. Can be an input or output.
VSS 5 3 P Negative power supply. This pin has the most negative power-supply potential. This pin can be connected to ground in single supply applications. Connect a decoupling capacitor ranging from 0.1 μF to 10 μF between VSS and GND for reliable operation.
GND 6 4 P Ground (0 V) reference.
S2B 7 5 I/O Source pin 2B. Can be an input or output.
D2 8 6 I/O Drain pin 2. Can be an input or output.
S2A 9 7 I/O Source pin 2A. Can be an input or output.
SEL2 10 8 I Logic control input 2; has internal pull-down resistor. Controls switch 2 (see Section 7.5).
SEL3 11 9 I Logic control input 3; has internal pull-down resistor. Controls switch 3 (see Section 7.5).
S3A 12 10 I/O Source pin 3A. Can be an input or output.
D3 13 11 I/O Drain pin 3. Can be an input or output.
S3B 14 12 I/O Source pin 3B. Can be an input or output.
EN 15 18 I Active low logic enable; has internal pull-down resistor. The SELx logic inputs determine switch connections when this pin is low (see Section 7.5).
VDD 16 13 P Positive power supply. This pin has the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 μF to 10 μF between VDD and GND.
S4B 17 14 I/O Source pin 4B. Can be an input or output.
D4 18 15 I/O Drain pin 4. Can be input or output
S4A 19 16 I/O Source pin 4A. Can be an input or output.
SEL4 20 17 I Logic control input 4, has internal pull-down resistor. Controls switch 4 (see Section 7.5).
Thermal Pad — The thermal pad is not connected internally. There is no requirement to solder this pad. If connected, it is recommended to leave the pad floating or tied to GND.
(1) I = input, O = output, I/O = input and output, P = power.
(2) Refer to Section 7.4 for what to do with unused pins.
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