ZHCSPX3A October   2022  – November 2022 TMUX7436F

PRODMIX  

  1. 1 特性
  2. 2 应用
  3. 3 说明
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Thermal Information
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Electrical Characteristics: Global
    6. 6.6  ±15 V Dual Supply: Electrical Characteristics
    7. 6.7  ±20 V Dual Supply: Electrical Characteristics
    8. 6.8  12 V Single Supply: Electrical Characteristics
    9. 6.9  36 V Single Supply: Electrical Characteristics
    10. 6.10 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1  On-Resistance
    2. 7.2  Off-Leakage Current
    3. 7.3  On-Leakage Current
    4. 7.4  Input and Output Leakage Current Under Overvoltage Fault
    5. 7.5  Enable Delay Time
    6. 7.6  Break-Before-Make Delay
    7. 7.7  Transition Time
    8. 7.8  Fault Response Time
    9. 7.9  Fault Recovery Time
    10. 7.10 Fault Flag Response Time
    11. 7.11 Fault Flag Recovery Time
    12. 7.12 Charge Injection
    13. 7.13 Off Isolation
    14. 7.14 Crosstalk
    15. 7.15 Bandwidth
    16. 7.16 THD + Noise
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Flat ON-Resistance
      2. 8.3.2 Protection Features
        1. 8.3.2.1 Input Voltage Tolerance
        2. 8.3.2.2 Powered-Off Protection
        3. 8.3.2.3 Fail-Safe Logic
        4. 8.3.2.4 Overvoltage Protection and Detection
        5. 8.3.2.5 Adjacent Channel Operation During Fault
        6. 8.3.2.6 ESD Protection
        7. 8.3.2.7 Latch-Up Immunity
        8. 8.3.2.8 EMC Protection
      3. 8.3.3 Overvoltage Fault Flags
      4. 8.3.4 Bidirectional Operation
      5. 8.3.5 1.8 V Logic Compatible Inputs
      6. 8.3.6 Integrated Pull-Down Resistor on Logic Pins
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Mode
      2. 8.4.2 Fault Mode
      3. 8.4.3 Truth Tables
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 接收文档更新通知
    3. 12.3 支持资源
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 术语表
  13. 13Mechanical, Packaging, and Orderable Information

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)
  • PW|16
散热焊盘机械数据 (封装 | 引脚)
订购信息

6.4 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VDD – VSS(1) Power supply voltage differential 8 44 V
VDD Positive power supply voltage  5 44
VS Source pin (Sx) voltage (non-fault condition) VSS VDD V
VS to GND Source pin (Sx) voltage to GND (fault condition) –60 60
VS to VDD(2) Source pin (Sx) voltage to VDD or VD (fault condition) –85
VS to VSS(2) Source pin (Sx) voltage to VSS or VD (fault condition) 85
VD Drain pin (Dx) voltage VSS VDD
VLOGIC Logic control input pin voltage (EN, SELx, DR) GND 44 V
VxF(3) Logic output pin voltage (FF, SF) GND 5.5
TA Ambient temperature –40 125 °C
IDC Continuous current through switch operating 1 channel, TSSOP package TA = 25°C 115 mA
TA = 85°C 115 mA
TA = 125°C 85 mA
IDC Continuous current through switch operating max number of channels at the same time, TSSOP package TA = 25°C 115 mA
TA = 85°C 115 mA
TA = 125°C 60 mA
(1) VDD and VSS can be any value as long as 8 V ≤ (VDD – VSS) ≤ 44 V, and the minimum VDD is met.
(2) Source pin voltage (Sx) under a fault condition may not exceed 85 V from supply pins (VDD and VSS.) or drain pins (D, Dx).
(3) Logic output pin (FF) is an open drain output and should be pulled up to a voltage within the maximum ratings.
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