ZHCSKO2A May   2020  – May 2022 TMUXHS4212

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 High-Speed Performance Parameters
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Output Enable and Power Savings
      2. 8.3.2 Data Line Biasing
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 USB 3.2 Implementation for USB Type-C
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curves
      2. 9.2.2 PCIe Lane Muxing
        1. 9.2.2.1 Application Curves
    3. 9.3 Systems Examples
      1. 9.3.1 USB/eSATA
      2. 9.3.2 MIPI Camera Serial Interface
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 接收文档更新通知
    2. 12.2 支持资源
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 术语表
  13. 13Mechanical, Packaging, and Orderable Information

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Data Line Biasing

The TMUXHS4212 has a weak pull-down of 1 MΩ from A[0/1][p/n] pins to GND. While these resistors biases the device data channels to common mode voltage (CMV) of 0 V with very weak strength, it is recommended that the device is biased by a stronger impedance from either side of the device to a valid value in the range of 0 – 1.8 V. To avoid double biasing, ensure that the appropriate ac coupling capacitors are on either side of the device.

In certain use cases, if both sides of the TMUXHS4212 are ac coupled, then it is recommended to use appropriate CMV biasing for the device. 10 kΩ to GND or any other bias voltage in the CMV range for each A[0/1][p/n] pin will suffice for most use cases.

The high-speed data ports incorporate 20 kΩ pull-down resistors that are switched in when a port is not selected and switched out when the port is selected. For example, when SEL = L, the C[0/1][p/n] pins have 20 kΩ resistors to GND. The feature ensures that the unselected port is always biased to a known voltage for long term reliability of the device and the electrical channel.

The positive and negative terminals of data pins A[0/1] have a weak (20 kΩ) differential resistor for device switch regulation operation. This does not impact signal integrity or functionality of high speed differential signaling that typically has much stronger differential impedance (such as 100 Ω).