ZHCSN19A December   2020  – October 2024 TMUXHS4412

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 High-Speed Performance Parameters
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Output Enable and Power Savings
      2. 6.3.2 Data Line Biasing
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 PCIe Lane Muxing
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Pin-to-Pin Passive Versus Redriver Option
        4. 7.2.1.4 Application Curves
    3. 7.3 Systems Examples
      1. 7.3.1 PCIe Muxing for Hybrid SSD
      2. 7.3.2 DisplayPort Main Link
      3. 7.3.3 USB 4.0 / TBT 3.0 Demuxing
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Related Documentation
      1. 8.1.1 Documentation Support
    2. 8.2 接收文档更新通知
    3. 8.3 支持资源
    4. 8.4 Trademarks
    5. 8.5 静电放电警告
    6. 8.6 术语表
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

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Layout Guidelines

On a high-K board, TI always recommends to solder the PowerPAD™ integrated circuit package onto the thermal land. A thermal land is the area of solder-tinned-copper underneath the PowerPAD integrated circuit package. On a high-K board, the TMUXHS4412 can operate over the full temperature range by soldering the Power-pad onto the thermal land without vias.

For high speed layout guidelines refer to the High-Speed Layout Guidelines for Signal Conditioners and USB Hubs application note.

On a low-K board, for the device to operate across the temperature range, the designer must use a 1oz Cu trace connecting the GND pins to the thermal land. A general PCB design guide for PowerPAD integrated circuit packages is provided in PowerPAD™ Thermally Enhanced Package application note.