ZHCSAA4B September   2012  – September 2015 TPA3110D2-Q1

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1. 3.1 TPA3110D2-Q1 简化应用原理图
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 DC Characteristics
    6. 6.6 DC Characteristics
    7. 6.7 AC Characteristics
    8. 6.8 AC Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 DC Detect
      2. 7.3.2 Short-Circuit Protection and Automatic Recovery Feature
      3. 7.3.3 Thermal Protection
      4. 7.3.4 GVDD Supply
    4. 7.4 Device Functional Modes
      1. 7.4.1 PBTL Select
      2. 7.4.2 Gain Setting Through GAIN0 and GAIN1 Inputs
      3. 7.4.3 SD Operation
      4. 7.4.4 PLIMIT
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 TPA3110D2-Q1 Modulation Scheme
        2. 8.2.2.2 Ferrite Bead Filter Considerations
        3. 8.2.2.3 Efficiency: LC Filter Required With the Traditional Class-D Modulation Scheme
        4. 8.2.2.4 When to Use an Output Filter for EMI Suppression
        5. 8.2.2.5 Input Resistance
        6. 8.2.2.6 Input Capacitor, CI
        7. 8.2.2.7 BSN and BSP Capacitors
        8. 8.2.2.8 Differential Inputs
        9. 8.2.2.9 Using Low-ESR Capacitors
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 器件支持
      1. 11.1.1 开发支持
    2. 11.2 文档支持
      1. 11.2.1 相关文档
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 Glossary
  12. 12机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

6.6 DC Characteristics

TA = –40°C to 125°C, VCC = 12 V, RL = 8 Ω (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
| VOS | Class-D output offset voltage (measured differentially) VI = 0 V, Gain = 36 dB 1.5 15 mV
ICC Quiescent supply current SD = 2 V, no load, PVCC = 12 V 20 35 mA
ICC(SD) Quiescent supply current in shutdown mode SD = 0.8 V, no load, PVCC = 12 V 200 µA
rDS(on) Drain-source on-state resistance VCC = 12 V, IO = 500 mA,
TJ = 25°C		 High side 240 mΩ
Low side 240
G Gain GAIN1 = 0.8 V GAIN0 = 0.8 V 19 20 21 dB
GAIN0 = 2 V 25 26 27
GAIN1 = 2 V GAIN0 = 0.8 V 31 32 33 dB
GAIN0 = 2 V 35 36 37
tON Turn-on time SD = 2 V 14 ms
tOFF Turn-off time SD = 0.8 V 2 μs
GVDD Gate drive supply IGVDD = 2 mA 6.4 6.9 7.4 V
VO Output voltage maximum under PLIMIT control V(PLIMIT) = 2 V; VI = 1 VRMS 6.75 7.90 8.75 V
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