9.4.1 Powering Up

The TPA3221 does not require a power-up sequence because of the integrated undervoltage protection (UVP), but it is recommended to hold RESET low until PVDD supply voltage is stable to avoid audio artifacts. The outputs of the H-bridges remain in a high-impedance state until the gate-drive supply (GVDD) and AVDD voltages are above their UVP voltage thresholds (see the Electrical Characteristics table of this data sheet). This allows an internal circuit to charge the external bootstrap capacitors by enabling a weak pull-down of the half-bridge output as well as initiating a controlled ramp up sequence of the output voltage.

Figure 47. Startup Timing

When RESET is released to turn on TPA3221, FAULT signal will turn low and AVDD voltage regulator will be enabled. FAULT will stay low until AVDD reaches the undervoltage protection (UVP) voltage threshold (see the Electrical Characteristics table of this data sheet). After a pre-charge time to stabilize the DC voltage across the input AC coupling capacitors, the ramp up sequence starts and completes once the CMUTE node is charged to its final value.