The TPA3223 does not require a power-up sequence because of the integrated undervoltage protection (UVP), but TI recommends to hold RESET low until PVDD supply voltage is stable to avoid audio artifacts. The outputs of the H-bridges remain in a high-impedance state until the gate-drive supply (GVDD) and AVDD voltages are above their UVP voltage thresholds (see the Section 7.5 table of this data sheet). Doing so allows an internal circuit to charge the external bootstrap capacitors by enabling a weak pull-down of the half-bridge output as well as initiating a controlled ramp up sequence of the output voltage.

Figure 9-13 Startup Timing

When RESET is released to turn on TPA3223, FAULT signal turns low. FAULT stays low until AVDD reaches the undervoltage protection (UVP) voltage threshold (see the Section 7.5 table of this data sheet). After a pre-charge time to stabilize the DC voltage across the input AC coupling capacitors, the ramp up sequence starts and completes once the CMUTE node is charged to the final value.