11.1 Layout Guidelines

For proper operation, follow these layout and design guidelines:

• Place the TPD12S015 as close to the connector as possible. This allows it to remove the energy associated with ESD strike before it reaches the internal circuitry of the system board.
• Place power line capacitors and inductors close to the pins with wide traces to allow enough current to flow through with less trace parasitics.
• Ensure that there is enough metallization for the GND pad. A sufficient current path enables safe discharge of all the energy associated with the ESD strike.
• The critical routing paths for HDMI interface are the high-speed TMDS lines. Make sure to match the lengths of the differential pair. Maintain constant trace width after to avoid impedance mismatches in the transmission lines. Maximize differential pair-to-pair spacing when possible.

For more layout information, see TPD12S015 PCB Layout Guidelines.

11.2 Layout Example

Figure 25. Board Layout (DC-DC Components) (Top View)

List of components:

• L_IN = MURATA LQM21PN1R0MC0 or L_IN = Toko MDT2010-CN1R0
• C_IN = MURATA GRM188R60J225ME19 (2.2 µF, 6.3 V, 0603, X5R) or MURATA GRM188R60J475ME19 (4.7 µF, 6.3 V, 0603, X5R)
• C_OUT = MURATA GRM188R60J475ME19 (4.7 µF, 6.3 V, 0603, X5R)
• C_VCCA = MURATA GRM155R60J104MA01 (0.1 µF, 6.3 V, 0402, X5R)