10.1 Layout Guidelines

• The optimum placement is as close to the connector as possible.
  • EMI during an ESD event can couple from the trace being struck to other nearby unprotected traces, resulting in early system failures.
  • The PCB designer needs to minimize the possibility of EMI coupling by keeping any unprotected traces away from the protected traces which are between the TVS and the connector.
• Route the protected traces as straight as possible.
• Eliminate any sharp corners on the protected traces between the TVS and the connector by using rounded corners with the largest radii possible.
  • Electric fields tend to build up on corners, increasing EMI coupling.

10.2 Layout Example

Figure 5 is an example of how to layout three data lines with the TPD3E001. One example could be protecting a USB micro-AB connector from IEC ESD, as discussed in the Application and Implementation section.

Figure 5. Routing with the DRL Package