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ZHCSLC3B may 2020 – april 2023 TPD3S713-Q1 , TPD3S713A-Q1

PRODUCTION DATA

封装选项

请参考 PDF 数据表获取器件具体的封装图。

机械数据 (封装 | 引脚)

RVC|20

散热焊盘机械数据 (封装 | 引脚)

RVC|20
- QFND186C

订购信息

6.5 Electrical Characteristics

Unless otherwise noted, –40°C ≤ T_J ≤ 125°C and 4.5 V ≤ V_(IN) ≤ 5.5 V, V_(EN) = V_(INT1) = V_{(ILIM_SEL)} = V_(IN), V_(INT2) = GND, R_(FAULT) = 10 kΩ, R_(IMON) = 2.55 kΩ, R_{(ILIM_HI)} = 52.3 kΩ. Positive currents are into pins. Typical values are at T_J = 25°C. All voltages are with respect to GND.

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
OUT – POWER SWITCH
r_DS(on)	On-resistance⁽¹⁾	T_J = 25°C		73	90	mΩ
r_DS(on)	On-resistance⁽¹⁾	–40°C ≤T_J ≤ 125°C		73	120	mΩ
I_lkg	Reverse leakage current	V_BUS = 5 V, V_IN = V_EN = 0 V, –40°C ≤ T_J ≤ 125°C, measure I_(IN)		0.01	2	µA
OUT – DISCHARGE
R_(DCHG)	Discharge resistance (ILIM_SEL change)		400	500	630	Ω
ENABLE, ILIM_SEL, INT1, INT2 INPUTS
	Input pin rising logic threshold voltage		0.8	1.35	2	V
	Input pin falling logic threshold voltage		0.7	1.15	1.65	V
	Hysteresis⁽²⁾			200		mV
	Input current	Pin voltage = 0 V or 5.5 V	–1		1	µA
CURRENT LIMIT
I_OS	VBUS short-circuit current limit	R_{ILIM_HI} or R_{ILIM_LO} = 80.6 kΩ	38	55	71	mA
		R_{ILIM_HI} or R_{ILIM_LO} = 52.3 kΩ	62	82	102
		R_{ILIM_HI} or R_{ILIM_LO} = 22.1 kΩ	166	192	218
		R_{ILIM_HI} or R_{ILIM_LO} = 15.4 kΩ	245	275	305
		R_{ILIM_HI} or R_{ILIM_LO} = 6.98 kΩ	560	600	640
		R_{ILIM_HI} Shorted to GND	860	1150	1440
R_{ILIM_HI} Shorted to GND
I_{(IN_OFF)}	Disabled IN supply current	V_(EN) = 0 V, V_(BUS) = 0 V, –40°C ≤ T_J ≤ 125°C, no 5.1-kΩ resistor (open) between BIAS and VBUS		0.1	10	µA
I_{(IN_ON)}	Enabled IN supply current	V_(INT1) = V_{(ILIM_SEL)} = High		200	280	µA
UNDERVOLTAGE LOCKOUT, IN
V_(UVLO)	UVLO threshold voltage	IN rising	3.9	4.1	4.3	V
V_(UVLO)	UVLO threshold voltage	IN falling	3.3	3.5	3.7	V
FAULT
	Output low voltage	I_(FAULT) = 1 mA			100	mV
	Off-state leakage	V_(FAULT) = 5.5 V			2	µA
THERMAL SHUTDOWN
T_(OTSD2)	Thermal shutdown threshold		155			°C
T_(OTSD1)	Thermal shutdown threshold in current-limit		135			°C
	Hysteresis⁽³⁾			20		°C
DM_IN AND DP_IN OVERVOLTAGE PROTECTION
V_{(OV_Data)}	Protection trip threshold	DP_IN and DM_IN rising	3.3	3.9	4.15	V
	Hysteresis⁽³⁾			100		mV
R_{(DCHG_Data)}	Discharge resistor after OVP(3)	DP_IN = DM_IN = 18 V, IN = 5 V or 0 V		200		kΩ
		DP_IN = DM_IN = 5 V, IN = 5 V		370
		DP_IN = DM_IN = 5 V, IN = 0		390
BUS OVERVOLTAGE PROTECTION
V_{(OV_BUS)}	Protection trip threshold	VBUS rising	5.65	6	6.35	V
	Hysteresis⁽³⁾			90		mV
R_{(DCHG_BUS)}	Discharge resistor	VBUS = 18 V, IN = 5 V		55	85	kΩ
R_{(DCHG_BUS)}	Discharge resistor	VBUS = 18 V, IN = 0		80	120	kΩ
CABLE COMPENSATION
I_(CS)	Sink current	Load = 0.5 A, 2.5 V ≤ V_(CS) ≤ 5.5 V	190	210	230	µA
CURRENT MONITOR OUTPUT (IMON)
I_(IMON)	Source current	Load = 0.5 A, 0 ≤ V_(IMON) ≤ 2.5 V	245	265	285	µA
HIGH-BANDWIDTH ANALOG SWITCH
R_{(HS_ON)}	DP and DM switch on-resistance	V_{(DP_OUT)} = V_{(DM_OUT)} = 0 V, I_{(DP_IN)} = I_{(DM_IN)} = 30 mA		3.2	6.5	Ω
R_{(HS_ON)}	DP and DM switch on-resistance	V_{(DP_OUT)} = V_{(DM_OUT)} = 2.4 V, I_{(DP_IN)} = I_{(DM_IN)} = –15 mA		3.8	7.6	Ω
\|ΔR_{(HS_ON)}\|	Switch resistance mismatch between DP and DM channels	V_{(DP_OUT)} = V_{(DM_OUT)} = 0 V, I_{(DP_IN)} = I_{(DM_IN)} = 30 mA		0.05	0.15	Ω
\|ΔR_{(HS_ON)}\|	Switch resistance mismatch between DP and DM channels	V_{(DP_OUT)} = V_{(DM_OUT)} = 2.4 V, I_{(DP_IN)} = I_{(DM_IN)} = –15 mA		0.05	0.15	Ω
C_{(IO_OFF)}	DP and DM switch off-state capacitance⁽⁴⁾	V_EN = 0 V, V_{(DP_IN)} = V_{(DM_IN)} = 0.3 V, Vac = 0.03 V_PP, f = 1 MHz		8.8		pF
C_{(IO_ON)}	DP and DM switch on-state capacitance⁽⁴⁾	V_{(DP_IN)} = V_{(DM_IN)} = 0.3 V, Vac = 0.03 V_PP, f = 1 MHz		10.9		pF
	Off-state isolation(4)	V_(EN) = 0 V, f = 250 MHz		12		dB
	On-state cross-channel isolation⁽⁴⁾	f = 250 MHz		34		dB
I_lkg(OFF)	Off-state leakage current	V_EN = 0 V, V_{(DP_IN)} = V_{(DM_IN)} = 3.6 V, V_{(DP_OUT)} = V_{(DM_OUT)} = 0 V, measure I_{(DP_OUT)} and I_{(DM_OUT)}		0.1	1.5	µA
BW	Bandwidth (–3 dB)⁽⁴⁾	R_(L) = 50 Ω		1230		MHz

(1) Pulse-testing techniques maintain junction temperature close to ambient temperature. Thermal effects must be taken into account separately.

(2) This parameter is provided for reference only and does not constitute part of TI's published device specifications for purposes of TI's product warranty.

(3) This parameter is provided for reference only and does not constitute part of TI's published device specifications for purposes of TI's product warranty.

(4) This parameter is provided for reference only and does not constitute part of TI's published device specifications for purposes of TI's product warranty.