SLVS817G May 2008 – June 2015 TPD4S009 , TPD4S010
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 ±8-kV IEC61000-4-2 Level 4 Contact ESD Protection
- 7.3.2 IEC61000-4-5 Surge Protection
- 7.3.3 I/O Capacitance
- 7.3.4 Low Leakage Current
- 7.3.5 Supports High-Speed Differential Data Rates
- 7.3.6 Ultra-low Matching Capacitance Between Differential Signal Pairs
- 7.3.7 Ioff Feature for the TPD4S009
- 7.3.8 Industrial Temperature Range
- 7.3.9 Easy Flow-Through Routing
- 7.4 Device Functional Modes
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
11 Device and Documentation Support
11.1 Documentation Support
11.1.1 Related Documentation
For related information see, SLVSBO7
11.2 Trademarks
All trademarks are the property of their respective owners.
11.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
11.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.