SLLSE38B June   2010  – March 2016 TPD8E003

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 ESD Ratings - Surge Protection
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 IEC 61000-4-2 ESD Protection
      2. 7.3.2 IEC 61000-4-5 Surge Protection
      3. 7.3.3 IO Capacitance
      4. 7.3.4 DC Breakdown Voltage
      5. 7.3.5 Low Leakage Current
      6. 7.3.6 Industrial Temperature Range
      7. 7.3.7 Space-Saving Package
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Signal Range
        2. 8.2.2.2 Required ESD Protection
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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7 Detailed Description

7.1 Overview

The TPD8E003 is a unidirectional TVS-based, ESD protection diode array. The TPD8E003 is rated to dissipate ESD strikes above the maximum level specified in the IEC 61000-4-2 international standard (Level 4). This device provides 8 channels of ESD protection in a space-saving WSON package.

7.2 Functional Block Diagram

TPD8E003 circuitschem_llse38.gif

7.3 Feature Description

7.3.1 IEC 61000-4-2 ESD Protection

The I/O pins can withstand ESD events up to ±12-kV contact and ±15-kV air gap. An ESD/surge clamp diverts the current to ground.

7.3.2 IEC 61000-4-5 Surge Protection

The I/O pins can withstand surge events up to 3.5 A and 55 W (8/20 µs waveform). An ESD/surge clamp diverts this current to ground.

7.3.3 IO Capacitance

The capacitance between each I/O pin-to-ground is 9 pF (typical) and 12 pF (maximum).

7.3.4 DC Breakdown Voltage

The DC breakdown voltage of each I/O pin is a minimum of 6 V. This ensures that sensitive equipment is protected from surges above the reverse standoff voltage of 5.5 V.

7.3.5 Low Leakage Current

The I/O pins feature an low leakage current of 100 nA (maximum) with a bias of 2.5 V.

7.3.6 Industrial Temperature Range

This device features an industrial operating range of –40°C to 85°C.

7.3.7 Space-Saving Package

This device features a space-saving WSON package that puts many channels of ESD in a small form factor.

7.4 Device Functional Modes

TPD8E003 is a passive integrated circuit that triggers when voltages are above VBR or below the lower diodes Vf (–0.6 V). During ESD events, voltages as high as ±15 kV (air) can be directed to ground through the internal diode network. When the voltages on the protected line fall below the trigger levels of TPD8E003 (usually within 10s of nano-seconds) the device reverts to passive.