8.3.1 4-Channels of Short-to-V_BUS Overvoltage Protection (CC1, CC2, SBU1, SBU2 Pins or CC1, CC2, DP, DM Pins): 24-V_DC Tolerant

The TPD8S300A provides 4-channels of Short-to-V_BUS Overvoltage Protection for the CC1, CC2, SBU1, and SBU2 pins (or the CC1, CC2, DP, and DM pins) of the USB Type-C connector. The TPD8S300A is able to handle 24-V_DC on its C_CC1, C_CC2, C_SBU1, and C_SBU2 pins. This is necessary because according to the USB PD specification, with V_BUS set for 20-V operation, the V_BUS voltage is allowed to legally swing up to 21 V and 21.5 V on voltage transitions from a different USB PD V_BUS voltage. The TPD8S300A builds in tolerance up to 24-V_BUS to provide margin above this 21.5-V specification to be able to support USB PD adaptors that may break the USB PD specification.

When a short-to-V_BUS event occurs, ringing happens due to the RLC elements in the hot-plug event. With very low resistance in this RLC circuit, ringing up to twice the settling voltage can appear on the connector. More than 2x ringing can be generated if any capacitor on the line derates in capacitance value during the short-to-V_BUS event. This means that more than 44 V could be seen on a USB Type-C pin during a Short-to-V_BUS event. The TPD8S300A has built in circuit protection to handle this ringing. The diode clamps used for IEC ESD protection also clamp the ringing voltage during the short-to-V_BUS event to limit the peak ringing to approximately 30 V. Additionally, the overvoltage protection FETs integrated inside the TPD8S300A are 30-V tolerant, therefore being capable of supporting the high-voltage ringing waveform that is experienced during the short-to-V_BUS event. The well designed combination of voltage clamps and 30-V tolerant OVP FETs insures the TPD8S300A can handle Short-to-V_BUS hot-plug events with hot-plug voltages as high as 24-V_DC.

The TPD8S300A has an extremely fast turnoff time of 70 ns typical. Furthermore, additional voltage clamps are placed after the OVP FET on the system side (CC1, CC2, SBU1, SBU2) pins of the TPD8S300A, to further limit the voltage and current that are exposed to the USB Type-C CC/PD controller during the 70 ns interval while the OVP FET is turning off. The combination of connector side voltage clamps, OVP FETs with extremely fast turnoff time, and system side voltage clamps all work together to insure the level of stress seen on a CC1, CC2, SBU1, or SBU2 pin during a short-to-V_BUS event is less than or equal to an HBM event. This is done by design, as any USB Type-C CC/PD controller will have built in HBM ESD protection.

The SBU OVP FETs where designed with a 1-GHz bandwidth to be able to be used to protect the DP, DM (USB2.0) pins in addition to the SBU pins. Some systems designers also prefer to protect the DP, DM pins from Short-to-V_BUS events due to the potential for moisture/water in the connector to short the V_BUS pins to DP, DM pins. This can be especially applicable in cases where the end equipment with a USB Type-C connector is trying to be made water-proof. If desiring to protect the DP, DM pins on the USB Type-C connector from a Short-to-V_BUS event, connect the C_SBUx pins to the DP, DM pins on the USB Type-C connector, and the SBUx pins to the USB2.0 pins of the system device being protected from the Short-to-V_BUS event.

Figure 29 is an example of the TPD8S300A successfully protecting the TPS65982, the world's first fully integrated, full-featured USB Type-C and PD controller.

Figure 29. TPD8S300A Protecting the TPS65982 During a Short-to-V_BUS Event