SLIS125B December   2006  – December 2014 TPIC74100-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Dissipation Rating Table
    6. 6.6 Electrical Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Switch-Mode Input/Output Pins (L1, L2)
      2. 7.3.2  Supply Pin (Vdriver)
      3. 7.3.3  Internal Supply Decoupling Pin (Vlogic)
      4. 7.3.4  Input Voltage Monitoring Pin (AIN)
      5. 7.3.5  Input Undervoltage Alarm Pin (AOUT)
      6. 7.3.6  Reset Delay Timer Pin (REST)
      7. 7.3.7  Reset Pin (RESET)
      8. 7.3.8  Main Regulator Output Pin (VOUT)
      9. 7.3.9  Low-Power-Mode Pin (CLP)
      10. 7.3.10 Switch-Output Pin (5Vg)
      11. 7.3.11 5Vg-Enable Pin (5Vg_ENABLE)
      12. 7.3.12 Slew-Rate Control Pins (SCR0, SCR1)
      13. 7.3.13 Modulator Frequency Setting (Pin Rmod)
      14. 7.3.14 Ground Pin (PGND)
      15. 7.3.15 Enable Pin (ENABLE)
      16. 7.3.16 Bootstrap Pins (Cboot1 and Cboot2)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Clock Modulator
      2. 7.4.2 Buck/Boost Transitioning
      3. 7.4.3 Buck SMPS
      4. 7.4.4 Boost SMPS
      5. 7.4.5 Extension of the Input Voltage Range on V(driver)
      6. 7.4.6 Low-Power Mode
      7. 7.4.7 Temperature and Short-Circuit Protection
      8. 7.4.8 Switch-Output Pin (5Vg) Current Limitation
      9. 7.4.9 Soft Start
  8. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Buck Mode
        2. 8.2.2.2 Boost Mode
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Switch-Mode Power Supply
        1. 10.1.1.1 Inductor
        2. 10.1.1.2 Filter Capacitors
        3. 10.1.1.3 Traces and Ground Plane
      2. 10.1.2 Package and PCB Land Configuration for a Multilayer PCB
      3. 10.1.3 Multilayer (Side View)
      4. 10.1.4 Single-Layer
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

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6 Specifications

6.1 Absolute Maximum Ratings

over recommended operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Unregulated input voltage, V(driver)(2) –0.5 40 V
Unregulated inputs, V(AIN), V(ENABLE)(2) –0.5 40 V
Bootstrap voltages V(Cboot1) 52 V
V(Cboot2) 14
Switch mode voltages V(L1) –1 40 V
V(L2) –1 7
Logic input voltages, V(Rmod),V(SCR0),V(SCR1),V(CLP), and V(5Vg_ENABLE) (2) –0.5 7 V
Low output voltages, V(RESET),V(AOUT),V(logic), and V(REST)(2) –0.5 7 V
Thermal impedance, junction-to-case, RθJC(3) 2 °C/W
Thermal impedance, junction-to-ambient RθJA(3) 32 °C/W
RθJA(4) 40 °C/W
Continuous power dissipation, PD See Dissipation Ratings
Operating virtual junction temperature range, TJ –40 150 °C
Operating ambient temperature range, TA –40 125 °C
Lead temperature (soldering, 10 s), T(LEAD) 260 °C
Storage temperature, Tstg –65 125 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to ground.
(3) The thermal data is based on using 2-oz copper trace with at least four square inches of copper footprint for heat dissipation. The copper pad is soldered to the thermal land pattern. Correct attachment procedure must be incorporated.
(4) The thermal data is based on using 1-oz copper trace with at least four square inches of copper footprint for heat dissipation. The copper pad is soldered to the thermal land pattern. Correct attachment procedure must be incorporated.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per JEDEC Pin 7 (L2), pin 8 (VOUT), pin 9 (5Vg) ±800 V
Pins 1–6 and 10–20 ±2000
Charged device model (CDM), per JEDEC Corner pins (SCR1, AIN, SCR0, and CLP) ±750
Other pins ±750

6.3 Recommended Operating Conditions

MIN NOM MAX UNIT
Unregulated input voltage, V(driver) 6 24 V
Unregulated input voltages, V(AIN) and V(ENABLE) 0 24 V
Switch-mode pins V(L1) –1 17 V
V(L2) 5 5.5
Bootstrap voltages V(Cboot1) V(driver) + 10 V
V(Cboot2) 8
Logic levels (I/O), V(Rmod), V(logic),V(SCR0),V(SCR1),V(5Vg_ENABLE),V(RESET), V(AOUT), V(CLP), and V(REST) 0 5.25 V
Operating ambient temperature range, TA –40 125 °C
Logic levels (I/O), V(SCR0), V(SCR1), V(CLP) directly connected to V(logic) V(logic) V(logic) V

6.4 Thermal Information

THERMAL METRIC(1) TPIC74100-Q1 UNIT
PWP
20 PINS
RθJA Junction-to-ambient thermal resistance 37.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 22.7
RθJB Junction-to-board thermal resistance 20.2
ψJT Junction-to-top characterization parameter 0.7
ψJB Junction-to-board characterization parameter 19.9
RθJC(bot) Junction-to-case (bottom) thermal resistance 1.8
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Dissipation Rating Table

RθJA TA ≤ 25°C
POWER RATING		 DERATING FACTOR
ABOVE TA = 25°C		 TA = 85°C
POWER RATING		 TA = 125°C
POWER RATING
32°C/W 3.9 W 31.25 mW/°C 2.03 W 0.781 W
40°C/W 3.125 W 25 mW/°C 1.625 W 0.625 W

6.6 Electrical Characteristics

V(driver) = 6 V to 17 V, TA = -40°C to 125°C, unless otherwise noted
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V(driver) Unregulated input voltage 1.5 40 V
V(driver) Start-up condition voltage IO = 600 mA 5 V
SOM Soft-start ramp CO = 36 μF (min) to 220 μF (max) 4 20 V/ms
CO = 220 μF (min) to 470 μF (max)(1) 2 20
I(standby) Standby current ENABLE = low 10 20 μA
Iq Quiescent current CLP = 0 V, V(driver) = 11 V, IO = 0 mA 100 160 μA
VO Output voltage DC 5 V
VO Output-voltage tolerance Normal mode 2%
Boost/buck crossover or low-power mode 3%
IO Output current V(driver)≥ 7 V 1 A
IO(Boost) Output current, boost mode V(driver) = 2 V, see Note (2) 200 mA
V(driver)= 1.5 V, see Note (2) 120
IPPn Internal peak current limit (normal mode) (1) 1.75 2.5 A
IPPl Internal peak current limit (low-power mode) (1) 0.75 1.25 A
IP Peak current V(driver) = 16 V, IO = 1 A, and L = 33 μH 1.5 A
V(driver) Boost/buck crossover voltage window See Note (3) 5 5.9 V
Tot Thermal shutdown(4) 160 180 200 °C
5Vg OUTPUT AND ENABLE
rDS(on) On-state resistance 135 225 mΩ
IO Output current 400 mA
VI 5Vg_ENABLE input-voltage range –0.5 VO V
VIH 5Vg_ENABLE threshold high voltage V(5Vg) = 5 V 2.5 3 3.5 V
VIL 5Vg_ENABLE threshold low voltage V(5Vg) = 0 V 1.5 2 2.5 V
V(hys) Hysteresis voltage 0.5 1 V
r(pd) Internal pulldown resistor 300 500 850 kΩ
ENABLE
VI ENABLE input-voltage range –0.5 40 V
VIH ENABLE threshold high voltage 8 V ≤ V(driver) ≤ 17 V 2.5 3 3.5 V
6 V ≤ V(driver) < 8 V 1.9 3 3.5
VIL ENABLE threshold low voltage VO = 5 V 1.5 2 2.5 V
V(hys) Hysteresis voltage 8 V ≤ V(driver) ≤ 17 V 0.5 1 V
6 V ≤ V(driver) < 8 V 0.1
RESET
V(th) RESET threshold voltage 4.51 4.65 4.79 V
V(RESET) RESET tolerance 3%
t(RESET) RESET time C(REST) = 10 nF 8 10 12 ms
C(REST)= 100 nF, see Note (1) 80 100 120
VOL RESET output low voltage Isink = 5 mA 450 mV
Isink = 1 mA 84
t(deglitch) RESET deglitch time See Note(1) 8 10 12.5 μs
ALARM
VI Alarm input-voltage range –0.5 40 V
VIL Alarm threshold low voltage 2.2 2.3 2.35 V
VIH Alarm threshold high voltage 2.43 2.5 2.58 V
V(hys) Hysteresis voltage 200 mV
VOL Alarm output low voltage Isink = 5 mA 450 mV
Isink = 1 mA 84
LOW-POWER MODE (PULSE MODE) PFM
IO(LPM) Load current in low-power mode V(driver) < 7 V 50 mA
II(avg) Average input current V(driver) = 11 V, IO = 5 mA, CLP = low 3.55 mA
VO Output-voltage tolerance VO = 5 V 2.4% 3%
DIGITAL LOW-POWER MODE (CLP)
VIH High-level CLP input threshold voltage Normal mode 2.6 V
VIL Low-level CLP input threshold voltage Low-power mode 1.15 V
(1) Ensured by characterization
(2) Tested with inductor having following characteristics: L = 33 μH, Rmax = 0.1 Ω, IR = 1.8 A. Output current must be verified in application when inductor Rmax (ESR) is increased.
(3) Ensured by characterization. For further details, see the Buck/Boost Transitioning section.
(4) Ensured by characterization; hysteresis 15°C (typical)

6.7 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
f(sw) Switching frequency V(Rmod) = 0 V, modulator OFF 440 kHz
f(sw)ac Operating-frequency accuracy f(sw) = 440 kHz 20%
f(sw)min Modulation minimum frequency 270 330 445 kHz
f(sw)max Modulation maximum frequency 450 550 680 kHz
f(mod)span Modulation span 220 kHz
f(mod) Modulation frequency Rmod = 12 kΩ ±1% 28 kHz
f(mod)ac Modulation-frequency accuracy 12%

6.8 Typical Characteristics

(Reference L1 Pin, see Figure 10 through Figure 12)
slis122_g001.gif
Maximum characteristic specified by design.
Figure 1. Low-Power Mode Current, IO = 0 mA–10 mA
slis122_g003.gif
(1) Typical representation of input voltage vs output load current at TA = 25°C and 125°C, after the correct power-up sequence is invoked.
(2) The dip in the output current at 5.8V is caused byl the buck/boost transition of the IC.
(3) The output current is clipped to 1 A by the measurement setup.
Figure 3. Typical Input Voltage (V(driver)) vs
Maximum Output Load Current (IO)
slis122_g010.gif
CR1 = 0, SCR0 = 1
Figure 5. Input Current With Slope Control
slis122_g008.gif
SCR0 = 1, SCR1 = 1
Figure 7. Input Current With Slope Control
slis122_g012.gif
Figure 9. Nominal Switching Frequency of Q1 Switch
(446 kHz)
slis122_g006.gif
Rmod = 12 kΩ, IL = 200 mA
Figure 11. Maximum Switching Frequency (555 kHz) With Modulation Enabled
slis122_g014.gif
Figure 13. Input Voltage Excursions (Similar to Low-Crank Conditions)
slis122_g016.gif
Figure 15. Switch-Mode Regulator Transition From Boost Mode to Buck Mode
slis122_g018.gif
These values represent conducted EMI results of a test board for display purposes only. Actual results may vary greatly depending on board layout and external components and must be verified in actual application.
Figure 17. Conducted Emissions on Test Board Showing Effects of Minimum and Maximum Slew Rate Settings
slis122_g002.gif
Maximum characteristic specified by design.
Figure 2. Low-Power-Mode Current, IO = 0 mA–1 mA
slis122_g005.gif
SCR0 = 0, SCR1 = 0
Figure 4. Input Current With Slope Control
slis122_g011.gif
Figure 6. Input Current With Slope Control
slis122_g009.gif
Figure 8. Low-Power-Mode Operation
slis122_g013.gif
Rmod = 12 kΩ, IL = 200 mA
Figure 10. Minimum Switching Frequency (333 kHz) With Modulation Enabled
slis122_g007.gif
Figure 12. Modulation Frequency (Full Span) of 28 kHz
slis122_g015.gif
Figure 14. Switch-Mode Regulator Transition From Buck Mode to Boost Mode
slis122_g017.gif
These values represent conducted EMI results of a test board for display purposes only. Actual results may vary greatly depending on board layout and external components and must be verified in actual application.
Figure 16. Conducted Emissions on Test Board Showing Effects of Switching-Frequency Modulation
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