8.3.3 RSTn

To implement the reset interface between the TPL5010 and the µC a pullup resistance is required. 100 KΩ is recommended to minimize current.

During the POR and the reading of the REXT, the RSTn signal is LOW.

RSTn is asserted (LOW) for either one of the following conditions:

1. If the DELAY/M_RST pin is high for at least two consecutive cycles of the internal oscillator (approximately 20 ms).
2. At the beginning of a new time interval if DONE is not received at least 20 ms before the next WAKE rising edge (see Figure 8).