10.1 Layout Guidelines

Thin traces can be used on the input due to the low current logic that is typically used to drive TPL7407L. Care must be taken to separate the input channels as much as possible, as to eliminate cross-talk. Thick traces are recommended for the output, in order to drive whatever high currents that may be needed. Wire thickness can be determined by the trace material's current density and desired drive current.

Since all of the channels currents return to a common ground, it is best to size that trace width to be very wide. Some applications require up to 2 A.

Since the COM pin will only draw up to 25 µA thick traces are not necessary.

10.2 Layout Example

Figure 13. Package Layout

10.3 Thermal Considerations

The number of coils driven is dependent on the coil current and on-chip power dissipation. The number of coils driven can be determined by Figure 3, Figure 4, Figure 5, Figure 6, Figure 7, or Figure 8.

For a more accurate determination of number of coils possible, use the below equation to calculate TPL7407L on-chip power dissipation P_D:

Equation 2.

Where:

N is the number of channels active together.

V_OLi is the OUT_i pin voltage for the load current I_Li. This is the same as V_CE(SAT)

In order to guarantee reliability of TPL7407L and the system, the on-chip power dissipation must be lower than or equal to the maximum allowable power dissipation (P_D(MAX)) dictated by below equation Equation 3.

Equation 3.

Where:

T_J(MAX) is the target maximum junction temperature.

T_A is the operating ambient temperature.

θ_JA is the package junction to ambient thermal resistance.

It is recommended to limit TPL7407L IC’s die junction temperature to less than 125°C. The IC junction temperature is directly proportional to the on-chip power dissipation.