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SLUSFA1 September 2024 TPS1214-Q1

ADVANCE INFORMATION

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RGE|23
- MPQF802

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slusfa1_oa

8.3.2.1 Using Low Power Bypass FET (G Drive) for Load Capacitor Charging

In high-current applications where several FETs are connected in parallel in main path, the gate slew rate control for the main FETs is not recommended due to unequal distribution of inrush currents among the FETs resulting in over sizing of the FETs.

The TPS1214-Q1 integrates pre-charge gate driver (G) with a dedicated control input (LPM) and bypass comparator between CS2+ and CS2– pins. This feature can be used to drive a separate low power bypass FET and pre-charge the capacitive load with inrush current limiting. Figure 8-4 shows the low power bypass FET implementation for capacitive load charging using TPS1214-Q1. An external capacitor C_g reduces the gate turn ON slew rate and controls the inrush current.

TPS1214-Q1 Capacitor Charging Using Gate (G) Slew Rate
Control of Low Power Bypass FET

Figure 8-4 Capacitor Charging Using Gate (G) Slew Rate Control of Low Power Bypass FET

During power-up with EN/UVLO pulled high and LPM pulled low, the device turns ON bypass FET (G drive) by pulling G high with 100μA of source current and the main path (GATE) is kept OFF.

In this low power mode (LPM), TPS1214-Q1 senses voltage between CS2+ and CS2– pins along with VGS of bypass FET (G to SRC). The voltage across CS2+ and CS2– is compared initially with V_{(LPM_SCP)} threshold (2V typical) to detect powerup into short fault event until V_{(G_GOOD)} threshold is reached.

After V_{(G_GOOD)} threshold is reached, the voltage between CS2+ and CS2– is compared against V_(LWU) threshold (200mV typ) for load wakeup event. With this scheme capacitor charging current (I_INRUSH) can be set at higher than load wakeup threshold (I_LWU) and power-up into short event can also be detected reliably as shown in below timing diagram:

TPS1214-Q1 Timing Diagram for Bulk
Capacitor Charging Using Bypass Path

Figure 8-5 Timing Diagram for Bulk Capacitor Charging Using Bypass Path

Setting the Load Wakeup Trigger Threshold:

During normal operation, the series resistor R_BYPASS is used to set load wakeup current threshold. After VG_GOOD threshold is reached, the voltage between CS2+ and CS2– is compared against V(LWU) threshold (200mV typ) for load wakeup event.

RBYPASS can be selected using below equation:

Equation 2.

R_{B Y P A S S} = \frac{V_{(L W U)}}{I_{L W U}}

Setting the INRUSH Current:

Use Equation 6 to calculate the I_INRUSH:

Equation 3.

I_{I N R U S H} = C_{L O A D} \times \frac{V_{B A T T}}{T_{c h a r g e}}

Where,

C_LOAD is the load capacitance.

V_BATT is the input voltage and T_charge is the charge time.

I_INRUSH should be always less than wakeup in short in low power mode (I_{LPM_SC}) current which can be calculated using following equation:

Equation 4.

I_{L P M_S C} = \frac{V_{(L P M_S C P)}}{R_{B Y P A S S}}

Use Equation 5 to calculate the required C_g value.

Equation 5.

C_{g} = \frac{C_{L O A D} \times I_{(G)}}{I_{I N R U S H}}

Where,

I_(G) is 100µA (typical),

A series resistor R_g must be used in conjunction with C_g to limit the discharge current from C_g during turn-off. The recommended value for Rg is between 220Ω to 470Ω.

After the output capacitor is charged, main FETs can be controlled (GATE drive) and bypass FET (G drive) can be turned OFF by driving LPM high externally. The main FETs (G drive) can now be turned ON by driving INP high.

Figure 8-6 shows application circuit to charge large output capacitors using low power bypass path in high current applications.

TPS1214-Q1 TPS1214-Q1 Application Circuit for Capacitive Load Driving Using Low Power
Bypass FET (Q3) and Series Resistor (RBYPASS)

Figure 8-6 TPS1214-Q1 Application Circuit for Capacitive Load Driving Using Low Power Bypass FET (Q3) and Series Resistor (RBYPASS)