In the applications where low power bypass path is not used, the cap charging can be done using main FET GATE drive control.

For limiting inrush current during turn-ON of the main FET with capacitive loads, use R₁, R₂, C₁, D₂ as shown in Figure 8-7. The R₁ and C₁ components slow down the voltage ramp rate at the gate of main FET. The FET source follows the gate voltage resulting in a controlled voltage ramp across the output capacitors.

Figure 8-7 Inrush Current Limiting in Main Path

Use the Equation 6 to calculate the inrush current during turn-ON of the FET.

Where,

C_LOAD is the load capacitance.

VBATT is the input voltage and T_charge is the charge time.

V_(BST-SRC) is the charge pump voltage (12V).

Use a damping resistor R₂ (~10Ω) in series with C₁. Equation 8 can be used to compute required C₁ value for a target inrush current. A 100kΩ resistor for R₁ can be a good starting point for calculations.

D₂ ensures fast turn OFF of GATE drive by bypassing R₁.

C₁ results in an additional loading on C_BST to charge during turn-ON. Use below equation to calculate the required C_BST value:

Where,

Q_g(total) is the total gate charge of the FET,

ΔV_BST (1V typical) is the ripple voltage across BST to SRC pins.