The TPS16410, TPS16411, TPS16414, and TPS16415 devices respond to output overcurrent or overload conditions by actively limiting the output power. The devices first provide a blanking time configured by capacitance on PDLY pin. During this blanking time, the device can provide a current up to I_OCP value. After the end of this blanking time, the devices limit power to PLIM value. Power limit can be set by connecting a resistor on the PLIM pin. During power limiting, if the output power goes below PLIM (P_OUT < PLIM), the device resets the PDLY timer and restarts the PDLY timer when P_OUT > PLIM. Use Equation 4 to calculate the value of resistor for power limiting. The device is rated for 1.8-A continuous current, TI recommends to set PLIM < V_IN × 1.8 A and PLIM < 0.9 × V_OUT × I_OCP

Figure 8-12 illustrates the power limiting in the TPS16410 and TPS16411 devices for I_OUT < I_OCP and I_OCP ≤ I_OUT < I_fast-trip.

Figure 8-12 Power Limiting (I_OUT < I_OCP)

Figure 8-13 Power Limiting (I_OCP ≤ I_OUT < I_fast-trip)

During power limiting, the device dissipates a power of (V_IN – V_OUT) × I_OUT and the device gets heated up. If the junction temperature of device reaches thermal shutdown temperature (T_TSD), the device turns off the internal FET. If the device does not go into thermal shutdown, the internal FET is turned off after a duration of t_PLIM-DUR. After the internal FET is turned off, the TPS16410 and TPS16414 devices auto-retry while the TPS16411 and TPS16415 device latch off. If PLIM is connected to GND or left open, the device turns-off the internal FET. If the PDLY pin is left open or connected to GND, device provides t_PLIM-DUR = 155 ms unless the device enters thermal shutdown. Table 8-2 summarizes the device behavior for different output power and current.