The device has a built-in overtemperature shutdown circuitry designed to protect the internal FET if the junction temperature exceeds T_(TSD), 165°C (typical). After the thermal shutdown event, depending upon the mode of fault response configured as shown in Table 8-2, the device either latches off or commences an auto-retry cycle of 648 msec (typical), t_{(TSD_retry)} after T_J < [T_(TSD) – 11°C]. During the thermal shutdown, the fault pin FLT pulls low to indicate a fault condition.