SLVSHA1 September   2024 TPS1685

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Logic Interface
    7. 6.7 Timing Requirements
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Undervoltage Protection
      2. 7.3.2  Insertion Delay
      3. 7.3.3  Overvoltage Protection
      4. 7.3.4  Inrush Current, Overcurrent, and Short-Circuit Protection
        1. 7.3.4.1 Slew rate (dVdt) and Inrush Current Control
          1. 7.3.4.1.1 Start-Up Time Out
        2. 7.3.4.2 Steady-State Overcurrent Protection (Circuit-Breaker)
        3. 7.3.4.3 Active Current Limiting During Start-Up
        4. 7.3.4.4 Short-Circuit Protection
      5. 7.3.5  Analog Load Current Monitor (IMON)
      6. 7.3.6  Mode Selection (MODE)
      7. 7.3.7  Parallel Device Synchronization (SWEN)
      8. 7.3.8  Stacking Multiple eFuses for Unlimited Scalability
        1. 7.3.8.1 Current Balancing During Start-Up
      9. 7.3.9  Analog Junction Temperature Monitor (TEMP)
      10. 7.3.10 Overtemperature Protection
      11. 7.3.11 Fault Response and Indication (FLT)
      12. 7.3.12 Power Good Indication (PG)
      13. 7.3.13 Output Discharge
      14. 7.3.14 FET Health Monitoring
      15. 7.3.15 Single Point Failure Mitigation
        1. 7.3.15.1 IMON Pin Single Point Failure
        2. 7.3.15.2 IREF Pin Single Point Failure
        3. 7.3.15.3 ITIMER Pin Single Point Failure
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Single Device, Standalone Operation
      2. 8.1.2 Multiple Devices, Parallel Connection
    2. 8.2 Typical Application: 54V Power Path Protection in Data Center Servers
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Transient Protection
      2. 8.3.2 Output Short-Circuit Measurements
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Tape and Reel Information
    2. 11.2 Mechanical Data

封装选项

机械数据 (封装 | 引脚)
  • VMA|23
散热焊盘机械数据 (封装 | 引脚)
订购信息

7.3.6 Mode Selection (MODE)

This pin can be used to configure the TPS1685x as a primary device in a chain along with other TPS1685x eFuses, designated as secondary devices. This feature allows some of the TPS1685x pin functions to be changed to aid the primary + secondary parallel connection.

This pin is sampled at power up. Leaving the pin open configures it as a primary or standalone device. Connecting this pin to GND configures it as a secondary device.

The following functions are disabled in secondary mode and the device relies on the primary device to provide this functionality:

  1. IREF internal current source

  2. DVDT internal current source

  3. Overcurrent detection in steady-state for circuit-breaker response

  4. PG de-assertion (pulldown) after reaching steady-state

  5. Latch-off after fault

In secondary mode, the following functions are still active:

  1. Overtemperature protection

  2. Start-up current limit

  3. Active current sharing during inrush as well as steady-state

  4. Analog current monitor (IMON) in steady state

  5. Steady-state overcurrent detection based on IMON. This is indicated by pulling ITIMER pin low internally, but does not trigger circuit-breaker action on ITIMER expiry. Rather, it relies on the primary device to start its own ITIMER and then trigger the circuit-breaker action for the whole chain by pulling SWEN low after the ITIMER expiry. However, the secondary devices use an internal overcurrent timer as a backup in case the primary device fails to initiate circuit-breaker action for an extended period of time. Refer to Single Point Failure Mitigation section for details.

  6. Each device still has individual scalable and fixed fast-trip thresholds to protect itself. The individual short-circuit protection threshold is set to higher values in secondary mode so that the primary device can lower it further for the whole system.

  7. Individual OVP is set to maximum in secondary device so that the primary can lower it further for the whole system.

  8. FLT assertion based on individual device fault detection (except circuit-breaker).

  9. PG de-assertion control during inrush and assertion control after device reaches steady state. However, after that in steady state, the secondary device no longer controls the de-assertion of the PG in case of faults.

  10. SWEN assertion or de-assertion based on internal events as well as FET ON and OFF control based on SWEN pin status.

In secondary mode, the device behavior during short-circuit and fast-trip is also altered. More details are available in the Short-Circuit Protection section.
千亿体育app官网登录(中国)官方网站IOS/安卓通用版/手机APP | 米乐app下载官网（中国）|ios|Android/通用版APP最新版 | 米乐|米乐·M6（中国大陆）官方网站 | 千亿体育登陆地址 | 华体会体育（中国）HTH·官方网站 | 千赢qy国际_全站最新版千赢qy国际V6.2.14安卓/IOS下载 | 18新利网v1.2.5|中国官方网站 | bob电竞真人（中国官网）安卓/ios苹果/电脑版【1.97.95版下载】 | 千亿体育app官方下载(中国)官方网站IOS/安卓/手机APP下载安装 |