ZHCSLT0D November   2007  – October 2020 TPS2041B-Q1 , TPS2042B-Q1 , TPS2051B-Q1

PRODUCTION DATA  

  1. 特性
  2. 应用
  3. 说明
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagrams
    3. 8.3 Feature Description
      1. 8.3.1 Power Switch
      2. 8.3.2 Charge Pump
      3. 8.3.3 Driver
      4. 8.3.4 Enable ( ENx)
      5. 8.3.5 Enable (EN)
      6. 8.3.6 Overcurrent ( OCx)
      7. 8.3.7 Current Sense
      8. 8.3.8 Thermal Sense
      9. 8.3.9 Undervoltage Lockout (UVLO)
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Universal Serial Bus (USB) Applications
    2. 9.2 Typical Applications
      1. 9.2.1 TPS2042B-Q1 Typical Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Overcurrent
          2. 9.2.1.2.2 OC Response
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Hosts and Self-Powered Hubs and Bus-Powered Hubs
        1. 9.2.2.1 Design Requirements
          1. 9.2.2.1.1 USB Power-Distribution Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Low-Power Bus-Powered and High-Power Bus-Powered Functions
      3. 9.2.3 Generic Hot-Plug Applications
        1. 9.2.3.1 Design Requirements
        2. 9.2.3.2 Detailed Design Procedure
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 接收文档更新通知
    3. 12.3 支持资源
    4. 12.4 Trademarks
    5. 12.5 静电放电警告
    6. 12.6 术语表
  13. 13Mechanical, Packaging, and Orderable Information

封装选项

机械数据 (封装 | 引脚)
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订购信息

Detailed Design Procedure

To begin the design process a few parameters must be decided upon. The designer must know the following:

  • Normal input operation voltage
  • Current limit

Input and output capacitance improves the performance of the device; the actual capacitance must be optimized for the particular application. For all applications, TI recommends a 0.1 µF or greater ceramic bypass capacitor between IN and GND, as close to the device as possible for local noise decoupling. This precaution reduces ringing on the input due to power-supply transients. Additional input capacitance may be required on the input to reduce voltage undershoot from exceeding the UVLO of other load share one power rail with TPS2042BQ1 device or overshoot from exceeding the absolute-maximum voltage of the device during heavy transient conditions. This is especially important during bench testing when long, inductive cables are used to connect the evaluation board to the bench power supply. Output capacitance is not required, but TI recommends placing a high-value electrolytic capacitor on the output pin when large transient currents are expected on the output to reduce the undershoot, which is caused by the inductance of the output power bus just after a short has occurred and the TPS2042B-Q1 device has abruptly reduced OUT current. Energy stored in the inductance drives the OUT voltage down and potentially negative as it discharges.