10.1 Layout Guidelines

• The IN1 and OUT pins of the TPS2105-EP can carry up to 500 mA, so trace to these pins should have short length and wider traces to minimize the voltage drop to the load.
• Both the IN1 and IN2 pins should be bypassed to ground with a low-ESR ceramic bypass capacitor. The typical recommended bypass capacitance is 0.22-µF ceramic capacitor.
• A bypass capacitor and a load capacitor are needed on the output terminal.
• TI recommends a 220-µF output load capacitor for 100-mA loads.
• Locating the 1-µF ceramic bypass capacitor at the output can improve the immunity of the device to short-circuit transients.
• The GND terminal should be tied to the PCB ground plane at the terminal of the DUT.

10.2 Layout Examples

Figure 20. Input and Output Capacitors and DUT Area

Figure 21. Enable, Input, Output, and Ground Pins

Figure 22. Schematics Diagram