8.4.3 Start-up State
In this state the controller is turning on and charging the output cap. The operation is set as follows:
- The SS pin is internally connected to the GATE pin to allow for output dv/dt control.
- Lower gate sourcing current is applied to the GATE pin to allow for smaller SS caps.
- The lower current limit setting of VSNS,CL2 and a lower fast trip setting of VSNS,FST2 is used to minimize the MOSFET stress in case of a fault condition.
If any of the following occur, the controller will be kicked back to the OFF state:
- Input voltage is not in the valid range.
- The timer times out due to over-current.
- VCC is below its UVLO threshold and the IC doesn’t have enough power to operate properly.
- Fast trip is triggered.
Once the PG_degl signal goes Hi, the controller will move to the Normal Operation state.