8.3.1 Current Limit

The TPS23523 utilizes two current limit thresholds:

• I_CL1 – also referred to as high current limit threshold, which is used when the V_DS of the hot swap FET is low.
• I_CL2 – lower current limit threshold, which is used when the V_DS of the hot swap FET is high.

This dual level protection scheme ensures that the part has a higher chance of riding out voltage steps and other transients due to the higher current limit at low V_DS, while protecting the MOSFET during start into short and hot-short events, by setting a lower current limit threshold for conditions with high V_DS. The transition threshold is programmed with a resistor that is connected from the drain of the hot swap FET to the D pin of the TPS23523. The figure below illustrates an example with a I_CL1 set to 25 A and I_CL2 set to 3 A. Note that compared to a traditional SOA protection scheme this approach allows better utilization of the SOA in the 10 V < V_DS. < 40-V range, which is critical in riding through transients and voltage steps.

Note that in both cases the TPS23523 regulated the gate voltage to enforce the current limit. However, this regulation is not very fast and doesn’t offer the best protection against hot-shorts on the output. To protect in this scenario a fast comparator is used, which quickly pulls down the gate in case of severe over current events (2x bigger than V_CL1).

Figure 8. Dual Current Limit vs FET Power Limit