ZHCSA47E July 2012 – January 2018 TPS23751 , TPS23752
PRODUCTION DATA.
These features implement a Sleep Mode, permitting power savings at night (or some other system-driven criteria) by turning the active load circuits off while maintaining enough functionality for the PD to respond to a local power-up request.
The Sleep Mode is initiated by command of a local device controller (microprocessor) when the SLPb input is driven low. Sleep Mode is latched by this event, the converter is disabled, VDD regulates VC to 12.8 V, and the LED output is active. The LED output sinks current to light an LED biased from the VC pin with RLED as shown in Figure 31. LED can alert a local user that Sleep Mode is active. The TPS23752 signals the PSE that it wants to remain powered during sleep by drawing enough current to satisfy the IEEE 802.3at DC MPS requirements. If MODE was low when SLPb fell, a pulsed VDD current-draw scheme is implemented; otherwise a DC current is drawn. The input current consists of the TPS23752 bias currents and the LED sink current, assuming no additional loading on VC or VB. The MPS current draw is inhibited when APD is active. A local pushbutton switch (SWAKE in Figure 31) is monitored by the WAKE pin and the latched sleep state exits when the button is pressed. The button is connected to ARTN through an optocoupler LED (OPTO6 in Figure 31) that alerts the device controller the button was pushed during normal operation. The MODE pin also has a second function, serving to activate the LED output when driven low during normal converter operation. For more information regarding the TPS23752 Sleep Mode Feature, see TPS23752 Maintain Power Signature Operation In Sleep Mode (SLVA588).