8.2.2.7 Setting the PWM-VFO Threshold using the SRT pin

The TPS23751 and TPS23752 internally compares modified voltages at the SRT and CTL pins to determine the operating mode. The designer should consider the light load operating point (considering the value of V_CTL) where synchronous rectifier (M2 in Figure 31) gate drive and switching losses nearly match conduction losses of the rectifier diode (D_OUT in Figure 31). Typically, the designer characterizes circuit efficiency, output load, and control pin (V_CTL) voltage and then select the transition point. Both VFO → PWM (occurs at higher load current due to natural hysteresis) and PWM → VFO (occurs at slightly lower load current) transitions should be considered when choosing the V_SRT setpoint. As an example:

1. Assume that the desired efficiency transition threshold occurs at 18% of full load and V_CTL = 2.0 V
2. Determine where to set V_SRT.
Equation 2.
3. Set V_SRT using a voltage divider from V_B to ARTN as shown in Figure 31.
4. Choose R_SRT1 = 100 kΩ and then calculate R_SRT2 as follows:
Equation 3.
5. Select 11 kΩ for R_SRT2.