The PD section has the following self-protection functions.

• Hotswap switch current limit
• Hotswap switch foldback
• Hotswap thermal protection

The internal hotswap MOSFET is protected against output faults with a current limit and deglitched foldback. The PSE output cannot be relied on to protect the PD MOSFET against transient conditions, requiring the PD to provide fault protection. High stress conditions include converter output shorts, shorts from V_DD1 to RTN, or transients on the input line. An overload on the pass MOSFET engages the current limit, with V_RTN-VSS rising as a result. If V_RTN rises above approximately 12 V for longer than approximately 400 μs, the current limit reverts to the inrush limit, and turns the converter off. The 400-μs deglitch feature prevents momentary transients from causing a PD reset, provided that recovery lies within the bounds of the hotswap and PSE protection. Figure 8-5 shows an example of recovery from a 15-V PSE rising voltage step. The hotswap MOSFET goes into current limit, overshooting to a relatively low current, recovers to 420-mA, full-current limit, and charges the input capacitor while the converter continues to run. The MOSFET did not go into foldback because V_RTN-VSS was below 12 V after the 400-μs deglitch.

Figure 8-5 Response to PSE Step Voltage

The PD control has a thermal sensor that protects the internal hotswap MOSFET. Conditions like start-up or operation into a V_DD to RTN short cause high power dissipation in the MOSFET. An overtemperature shutdown (OTSD) turns off the hotswap MOSFET and class regulator, which are restarted after the device cools. The PD restarts in inrush current limit when exiting from a PD overtemperature event.

Pulling DEN to V_SS during powered operation causes the internal hotswap MOSFET to turn off. This feature allows a PD with secondary-side adapter ORing to achieve adapter priority. Take care with synchronous converter topologies that can deliver power in both directions.

The hotswap switch is forced off under the following conditions:

• V_APD above V_APDEN (approximately 1.5 V)
• V_DEN ≤ V_{PD_DIS} when V_VDD-VSS is in the operational range
• PD over temperature
• V_VDD-VSS < PoE UVLO (approximately 30.5 V)