9.2.5 Detailed Design Procedure

The following is a summarized design procedure:

1. Choose between the TPS2410 or TPS2411, see TPS2410 vs TPS2411 – MOSFET Control Methods.
2. Choose the V_DD source. Table 2 provides a guide for where to connect V_DD that covers most cases. V_DD may be directly connected to the supply, but an R_(VDD) / C_(VDD) of 10 Ω / 0.01 μF is recommended.

Table 2. V_DD Connection Guide

VA < 3 V	3 V ≤ VA  ≤ 3.5 V	VA > 3.5 V
Bias Supply > 3 V	VA or Bias Supply > 3 V. VC if always > 3 V	VC, VA or Bias for special configurations

3. Noise voltage and impedance at the A pin should be kept low. C_(A) may be required if there is noise on the bus, or A is not low impedance. If either of these is a concern, a C_(A) of 0.01 μF or more may be required.
4. Select C_(BYP) as 2200 pF, X7R, 25-V or 50-V ceramic capacitor.
5. If the noise and transient environment is not well known, design C_(FLTR) in, then experimentally determine if it is required. Start with a 100 pF, X7R, 25-V or 50-V ceramic capacitor and adjust if necessary.
6. Select M1 based on considerations of voltage drop, power dissipated, voltage ratings, and gate capacitance. See sections: MOSFET Selection and RSET and TPS2410 Regulation-Loop Stability.
7. Select R_(RSET) based on which MOSFET was chosen and reverse current considerations – see MOSFET Selection and RSET. If the noise and transient environment is not well known, make provision for R_(RSET) even when using the TPS2410.
8. Configure the UV and OV inputs per the desired behavior – UV, OV, and PG. Calculate the resistor dividers.
9. Add optional interface for PG, FLTB, and STAT as desired.
10. Make sure to connect RSVD to ground.

Figure 16. Design Template