SLVS503F November 2003 – February 2020 TPS2490 , TPS2491
PRODUCTION DATA.
Only the bypass capacitor charge current and small bias currents are evident when a board is first plugged in. The TPS249x is held inactive, and GATE, PROG, TIMER, and PG are held low for less than 1 ms while internal voltages stabilize. A start-up cycle is ready to take place after the stabilization.
GATE, PROG, TIMER, and PG are released after stabilization in this example because both the internal UVLO threshold and the external EN (enable) thresholds have been exceeded. The part begins sourcing current from the GATE pin and Q1 begins to turn on while the voltage across it, V(SENSE–OUT), and current through it, V(VCC–SENSE), are monitored. Current initially rises to the value which satisfies the power limit engine (PLIM ÷ VVCC) since the output capacitor was discharged.