ZHCSHG3B november 2017 – july 2020 TPS254900A-Q1
PRODUCTION DATA
请参考 PDF 数据表获取器件具体的封装图。
D+ and D– protection consists of ESD and OVP (overvoltage protection). The DP_IN and DM_IN pins provide ESD protection up to ±15 kV (air discharge) and ±8 kV (contact discharge) per IEC 61000-4-2 (see the Section 6.2 section for test conditions).
The ESD stress seen at DP_IN and DM_IN is impacted by many external factors, like the parasitic resistance and inductance between ESD test points and the DP_IN and DM_IN pins. For air discharge, the temperature and humidity of the environment can cause some difference, so the IEC performance should always be verified in the end-application circuit.
The IEC ESD performance of the TPS254900A-Q1 device depends on the capacitance connected from BIAS to GND. A 2.2-µF capacitor placed close to the BIAS pin is recommended. Connect the BIAS pin to OUT using a 5.1-kΩ resistor as a discharge path for the ESD stress.
OVP protection is provided for short-to-VBUS or short-to-battery conditions in the vehicle harness, preventing damage to the upstream USB transceiver or hub. When the voltage on DP_IN or DM_IN exceeds 3.9 V (typical), the TPS254900A-Q1 device quickly responds to block the high-voltage reverse connection to DP_OUT and DM_OUT. Overcurrent short-to-GND protection for D+ and D– is provided by the upstream USB transceiver.