ZHCSGV1C June 2017 – March 2018 TPS25740B
PRODUCTION DATA.
CTL1, CTL2, and CTL3 are open-drain output pins used to control an external power supply as summarized in Table 4. Depending upon the voltage requested by the sink, the device sets the CTL pins accordingly. No current flows into the pin in its high-z state.
| VOLTAGE CONTAINED in PDO REQUESTED by UFP | CTL3 STATE | CTL2 STATE | CTL1 STATE |
|---|---|---|---|
| 5 V | High-z | High-z | High-z |
| 9 V | High-z | Low | High-z |
| 12 V (if 12 V enabled by HIPWR pin)
15 V (if 20 V enabled by HIPWR pin) |
High-z | Low | Low |
| 15 V (if 12V enabled by HIPWR pin)
20 V (if 20 V enabled by HIPWR pin) |
Low | Low | Low |