ZHCSFH8D August 2016 – January 2018 TPS25741 , TPS25741A
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
Figure 44 shows an alternative usage of the GD pin can help protect against shorts on the VBUS pin in the receptacle. A resistor divider is used to minimize the time it takes the GD pin to be pulled low. Consider the situation where the VBUS pin is shorted at startup. At some point, the device closes the NFET switch to supply 5 V to VBUS. At that point, the short pulls down on the voltage seen at the VPWR pin. With the resistor values shown in Figure 44, once the voltage at the VPWR pin reaches 3.95 V the voltage at the GD pin is specified to be below VGD_TH(min). Without the 700-kΩ resistor, the voltage at the VPWR pin would have to reach VGD_TH(min) which takes longer. This comes at the expense of increased leakage current.
The GD resistor values can be calculated using the following process. First, calculate the smallest RGD1 that should be used to prevent the internal clamp current from exceeding IGD of 80 µA. For a 20 V advertised voltage, the OVP trip point could be as high as 24 V. Using VGDC(min) = 6.5 V and VOUT = VFOVP20(max) = 24 V, provides Equation 2:
The actual clamping current is less than 80 µA as some current flows into RGD2. Next, RGD2 can be calculated as follows:
where V(VPWR) = V(PWR_TH) falling (max) and V(GD_TH) = V(GD_TH) falling (min).
For this case, VVPWR = VPWR_TH falling (max) and VGD_TH = VGD_TH falling (min).