ZHCSTM4A October 2023 – March 2024 TPS25751
PRODUCTION DATA
The TPS25751 features clock stretching for the I2C protocol. The TPS25751 target I2C port can hold the clock line (SCL) low after receiving (or sending) a byte, indicating that it is not yet ready to process more data. The controller communicating with the target must not finish the transmission of the current bit and must wait until the clock line actually goes high. When the target is clock stretching, the clock line remains low.
The controller must wait until it observes the clock line transitioning high plus an additional minimum time (4 μs for standard 100-kbps I2C) before pulling the clock low again.
Any clock pulse can be stretched but typically it is the interval before or after the acknowledgment bit.