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ZHCSGW8 April 2017 TPS25810A-Q1

PRODUCTION DATA.

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7 Specifications

7.1 Absolute Maximum Ratings

over operating ambient temperature range, voltages are with respect to GND (unless otherwise noted) ⁽¹⁾

		MIN	MAX	UNIT
Pin voltage, V	AUDIO, AUX, CC1, CC2, CHG, CHG_HI, CS, DEBUG, EN, FAULT, IN1, IN2, OUT, POL, REF, UFP,	–0.3	7	V
Pin voltage, V	REF_RTN		Internally connected to GND	V
Pin positive source current, I_SRC	CC1, CC2, OUT, REF		Internally limited	A
Pin positive sink current, I_SNK	OUT (while applying V_BUS)		5	A
	CC1, CC2 (while applying V_CONN)		1	A
	AUDIO, CS, DEBUG, FAULT, POL, UFP		Internally limited	mA
Operating junction temperature, T_J		–40	180	°C
Storage temperature range, T_stg		–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 ESD Ratings

			VALUE	UNIT
V_(ESD)⁽¹⁾	Electrostatic discharge	Human-body model (HBM), per per AEC Q100-002⁽²⁾	±2 000	V
		Charged-device model (CDM), per per AEC Q100-011	±500
		61000-4-2 contact discharge, CC1 and CC2⁽³⁾ IEC	±8 000
		IEC 61000-4-2 air discharge, CC1 and CC2⁽³⁾	±15 000

(1) Electrostatic discharge (ESD) to measure device sensitivity and immunity to damage caused by assembly line electrostatic discharges into the device.

(2) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

(3) Surges per IEC61000-402, 1999 applied between CC1, CC2 and output ground of the TPS25810EVM-745.

7.3 Recommended Operating Conditions

Voltages are with respect to GND (unless otherwise noted)

			MIN	NOM	MAX	UNIT
V_IN	Supply voltage	IN1	4.5		6.5	V
		IN2	4.5		5.5
		AUX	2.9		5.5
V_I	Input voltage	CHG, CHG_HI, EN	0		5.5	V
V_IH	High-level input voltage	CHG, CHG_HI, EN	1.17			V
V_IL	Low-level voltage	CHG, CHG_HI, EN			0.63	V
V_PU	Pullup voltage	Used on AUDIO, CS, DEBUG, FAULT, POL, UFP,	0		5.5	V
I_SRC	Positive source current	OUT			3	A
I_SRC	Positive source current	CC1 or CC2 when supplying V_CONN			250	mA
I_SNK	Positive sink current (10 ms moving average)	AUDIO, CS, DEBUG, FAULT, POL, UFP			10	mA
I_{SNK_PULSE}	Positive repetitive pulse sink current	AUDIO, CS, DEBUG, FAULT, POL, UFP			Internally limited	mA
R_REF	Reference resistor		98	100	102	kΩ
T_J	Operating junction temperature		–40		125	°C

7.4 Thermal Information

THERMAL METRIC⁽¹⁾		TPS25810A-Q1	UNIT
		RVC (WQFN)
		20 PINS
R_θJA	Junction-to-ambient thermal resistance	39.3	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	43.4	°C/W
R_θJB	Junction-to-board thermal resistance	13	°C/W
ψ_JT	Junction-to-top characterization parameter	0.7	°C/W
ψ_JB	Junction-to-board characterization parameter	13	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	4.2	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

–40°C ≤ T_J ≤ 125°C, 4.5 V ≤ V_IN1 ≤ 6.5 V, 4.5 V ≤ V_IN2 ≤ 5.5 V, 2.9 V ≤ V_AUX ≤ 5.5 V; V_EN = V_CHG = V_{CHG_HI} = V_AUX, R_REF = 100 kΩ. Typical values are at 25°C. All voltages are with respect to GND. I_OUT and I_OS defined as positive out of the indicated pin (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
OUT – POWER SWITCH
r_DS(on)	On-resistance⁽¹⁾	T_J = 25°C, I_OUT= 3 A		34	37	mΩ
		–40°C ≤ T_J≤ 85°C, I_OUT= 3 A		34	46
		–40°C ≤ T_J≤ 125°C, I_OUT= 3 A		34	55
I_REV	OUT to IN reverse leakage current	V_OUT= 6.5 V, V_IN1 = V_EN = 0 V, –40°C ≤ T_J ≤ 85°C, I_REV is current out of IN1 pin		0	3	µA
OUT – CURRENT LIMIT
I_OS	Short-circuit current limit ⁽¹⁾		3.16	3.4	3.64	A
I_OS	Short-circuit current limit ⁽¹⁾	R_REF = 10 Ω			7	A
OUT – DISCHARGE
	Discharge resistance	V_OUT = 4 V, UFP signature removed from CC lines, time < t_{w_DCHG}	400	500	600	Ω
	Bleed discharge resistance	V_OUT = 4 V, No UFP signature on CC lines, time > t_{w_DCHG}	100	150	250	kΩ
REF
V_O	Output voltage		0.78	0.8	0.82	V
I_OS	Short circuit current	R_REF = 10 Ω	9.5		15.3	µA
FAULT
V_OL	Output low voltage	I_FAULT = 1 mA			350	mV
I_OFF	Off-state leakage	V_FAULT = 5.5 V			1	µA
CS
V_OL	Output low voltage	I_CS = 1 mA			350	mV
I_OFF	Off-state leakage	V_CS = 5.5 V			1	µA
I_TH	OUT sourcing, rising threshold current for load detect		1.8	1.95	2.1	A
	Hysteresis⁽²⁾			125		mA
CC1, CC2 – V_CONN POWER SWITCH
r_DS(on)	On-resistance	T_J= 25°C, I_OUT = 250 mA		365	420	mΩ
		–40°C ≤ T_J ≤ 85°C, I_OUT = 250 mA		365	530
		–40°C ≤ T_J ≤ 125°C, I_OUT = 250 mA		365	600
CC1, CC2 – V_CONN POWER SWITCH – CURRENT LIMIT
I_OS	Short-circuit current limit⁽¹⁾		300	355	410	mA
I_OS	Short-circuit current limit⁽¹⁾	R_REF = 10 Ω			800	mA
CC1, CC2 – CONNECT MANAGEMENT – DANGLING ELECTRONICALLY MARKED CABLE MODE
I_SRC	Sourcing current on the pass-through CC Line	0 V ≤ V_CCx ≤ 1.5 V	64	80	96	µA
I_SRC	Sourcing current on the Ra CC line	0 V ≤ V_CCx ≤ 1.5 V	64	80	96	µA
CC1, CC2 – CONNECT MANAGEMENT – ACCESSORY MODE
I_SRC	CCx sourcing current (CC2 – audio, CC1-debug)	0 V ≤ V_CCx ≤ 1.5 V	64	80	96	µA
I_SRC	CCx sourcing current (CC1 – audio, CC2-debug) ⁽²⁾	0 V ≤ V_CCx ≤ 1.5 V		0		µA
CC1, CC2 – CONNECT MANAGEMENT – UFP MODE
I_SRC	Sourcing current with either IN1 or IN2 in UVLO	0 V ≤ V_CCx ≤ 1.5 V V_IN1 < V_{TH_UVLO_IN1} or V_IN2 < V_{TH_UVLO_IN2}	64	80	96	µA
I_SRC	Sourcing current	V_CHG = 0 V and V_{CHG_HI}= 0 V 0 V ≤ V_CCx ≤ 1.5 V	75	80	85	µA
		V_CHG = V_AUX and V_{CHG_HI}= 0 V 0 V ≤ V_CCx ≤ 1.5 V	170	180	190
		V_CHG = V_AUXand V_{CHG_HI}= V_AUX 0 V ≤ V_CCx ≤ 2.45 V	312	330	348
UFP, POL, AUDIO, DEBUG
V_OL	Output low voltage	I_{SNK_PIN} = 1 mA			250	mV
I_OFF	Off-state leakage	V_PIN = 5.5 V			1	µA
EN, CHG, CHG_HI – LOGIC INPUTS
V_TH	Rising threshold voltage			0.925	1.15	V
V_TH	Falling threshold voltage		0.65	0.875		V
	Hysteresis⁽²⁾			50		mV
I_IN	Input current	V_EN = 0 V or 6.5 V	–0.5		0.5	µA
OVERTEMPERATURE SHUTDOWN
T_{TH_OTSD2}	Rising threshold temperature for device shutdown		155			°C
	Hysteresis⁽²⁾			20		°C
T_{TH_OTSD1}	Rising threshold temperature for OUT/ V_CONNswitch shutdown in current limit		135			°C
	Hysteresis⁽²⁾			20		°C
IN1
V_{TH_UVLO_IN1}	Rising threshold voltage for UVLO		3.9	4.1	4.3	V
	Hysteresis⁽²⁾			100		mV
I_IN1(DIS)	Disabled supply current	V_EN = 0 V, –40°C ≤ T_J ≤ 85°C			1	µA
I_{IN1(CC_OPEN)}	Enabled supply current with CC lines open	–40°C ≤ T_J ≤ 85°C			1	µA
I_IN1(Ra)	Enabled supply current with accessory or dangling electronically marked cable signature on CC lines				2	µA
I_IN1(Rd)	Enabled supply current with UFP attached	V_CHG = 0 V, or V_CHG = V_AUX and V_{CHG_HI} = 0 V		75	100	µA
I_IN1(Rd)	Enabled supply current with UFP attached			85	110	µA
IN2
V_{TH_UVLO_IN2}	Rising threshold voltage for UVLO		3.9	4.1	4.3	V
	Hysteresis⁽²⁾			100		mV
I_IN2(DIS)	Disabled supply current	V_EN = 0 V, –40°C ≤ T_J ≤ 85°C			1	µA
I_{IN2(CC_OPEN)}	Enabled supply current with CC lines open	–40°C ≤ T_J ≤ 85°C			1	µA
I_IN2(Ra)	Enabled supply current with accessory or dangling electronically marked cable signature on CC lines				2	µA
I_IN2(Rd)	Enabled supply current with UFP signature on CC lines (Includes IN current that provides the CC output current to the UFP Rd resistor)	V_CHG = 0 V, 0 V ≤ V_CCx ≤ 1.5 V		98	110	µA
		V_CHG = V_IN and V_{CHG_HI} = 0 V, 0 V ≤ V_CCx ≤ 1.5 V		198	215
		0 V ≤ V_CCx ≤ 2.45 V		348	373
AUX
V_{TH_UVLO_AUX}	Rising threshold voltage for UVLO		2.65	2.75	2.85	V
	Hysteresis⁽²⁾			100		mV
I_AUX(DIS)	Disabled supply current	V_EN = 0 V, –40°C ≤ T_J ≤ 85°C			1	µA
I_{AUX(CC_OPEN)}	Enabled internal supply current with CC lines open	–40°C ≤ T_J ≤ 85°C		0.7	3	µA
I_AUX(Ra)	Enabled supply current with accessory or dangling active cable signature on CC lines			140	185	µA
I_{AUX(Rd_noIN)}	Enabled supply current with UFP termination on CC lines and with either IN1 or IN2 in UVLO	V_IN1 < V_{TH_UVLO_IN1} or V_IN2 < V_{TH_UVLO_IN2}		145	190	µA
I_AUX(Rd)	Enabled supply current with UFP termination on CC lines			55	82	µA

(1) Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.

(2) These parameters are provided for reference only and do not constitute part of TI’s published specifications for purposes of TI’s product warranty.

7.6 Switching Characteristics

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
OUT – POWER SWITCH
t_r	Output-voltage rise time	V_IN1 = 5 V, C_L = 1 µF, R_L = 100 Ω (measured from 10% to 90% of final value)	1.2	1.8	2.5	ms
t_f	Output-voltage fall time		0.35	0.55	0.75	ms
t_on	Output-voltage turnon time	V_IN1 = 5 V, C_L = 1 µF, R_L = 100 Ω	2.5	3.5	5	ms
t_off	Output-voltage turnoff time	V_IN1 = 5 V, C_L = 1 µF, R_L = 100 Ω	2	3	4.5	ms
OUT – CURRENT LIMIT
t_ios	Current-limit response time to short circuit	V_IN1 – V_OUT = 1 V, R_L = 10 mΩ, see Figure 1		1.5	4	µs
FAULT
t_DEGA	Asserting deglitch time due to overcurrent		5.5	8.2	10.7	ms
t_DEGA(OC)	Asserting deglitch time due to overtemperature in current limit⁽¹⁾			0		ms
t_DEGA(OT)	Deasserting deglitch time		5.5	8.2	10.7	ms
CS
t_DEGA	Asserting deglitch time		5.5	8.2	10.7	ms
t_DEGD	Deasserting deglitch time		5.5	8.2	10.7	ms
OUT – DISCHARGE
	R_DCHG discharge time	V_OUT = 1 V, time I_{SNK_OUT} > 1 mA after UFP signature removed from CC lines	39	65	96	ms
CC1, CC2 - V_CONN POWER SWITCH
t_r	Output-voltage rise time	V_IN2 = 5 V, C_L = 1 µF, R_L = 100 Ω (measured from 10% to 90% of final value)	0.15	0.25	0.35	ms
t_f	Output-voltage fall time		0.18	0.22	0.26	ms
t_on	Output-voltage turnon time	V_IN2 = 5 V, C_L = 1 µF, R_L = 100 Ω	1	1.5	2	ms
t_off	Output-voltage turnoff time	V_IN2 = 5 V, C_L = 1 µF, R_L = 100 Ω	0.3	0.4	0.55	ms
CC1, CC2 – V_CONNPOWER SWITCH – CURRENT LIMIT
t_res	Current-limit response time to short circuit	V_IN2 – V_CONN = 1 V, R = 10 mΩ, see Figure 1		1	3	µs
UFP, POL, AUDIO, DEBUG
t_DEGR	Asserting deglitch time		100	150	200	ms
t_DEGF	Deasserting deglitch time		7.9	12.5	17.7	ms

(1) These parameters are provided for reference only and do not constitute part of TI’s published specifications for purposes of TI’s product warranty.