ZHCSJV0G June 2018 – July 2021 TPS25830-Q1 , TPS25831-Q1
PRODUCTION DATA
The TPS2583x-Q1 integrates an internal LDO to generate VCC for control circuitry and MOSFET drivers. The nominal voltage for VCC is 5 V. The VCC pin is the output of an LDO and must be properly bypassed. A high quality ceramic capacitor with a value of 2.2 µF to 4.7 µF, 10 V or higher rated voltage should be placed as close as possible to VCC and grounded to the PGND ground pin. The VCC output pin should not be loaded with more than 5 mA, or shorted to ground during operation.
In applications where VCONN support is required, the VCC pin can be over-driven with an external 5-V LDO capable of sourcing at least 300 mA. In this operating mode the external LDO is the source for the buck low-side switch gate drive as well as power to the internal VCONN mux.
Note if using external 5-V LDO for VCONN power, the timing sequence below must be required. External VCONN power can not be enabled before the TPS2583x-Q1 is enabled, external VCONN must be disabled before the TPS2583x-Q1 is disabled. In real application, customer can tie the EN of external 5-V LDO and EN of TPS2583x-Q1 together to meet the timing requirement.