The TPS2583x-Q1 integrates an internal LDO to generate V_CC for control circuitry and MOSFET drivers. The nominal voltage for V_CC is 5 V. The V_CC pin is the output of an LDO and must be properly bypassed. A high quality ceramic capacitor with a value of 2.2 µF to 4.7 µF, 10 V or higher rated voltage should be placed as close as possible to VCC and grounded to the PGND ground pin. The V_CC output pin should not be loaded with more than 5 mA, or shorted to ground during operation. Shorting V_CC to ground during operation may cause damage to the TPS2583x-Q1.

In applications where V_CONN support is required, the V_CC pin can be over-driven with an external 5-V LDO capable of sourcing at least 300 mA. In this operating mode the external LDO is the source for the buck low-side switch gate drive as well as power to the internal V_CONN mux.

Note if using external 5-V LDO for V_CONN power, the timing sequence below must be required. External V_CONN power can not be enabled before the TPS2583x-Q1 is enabled, external V_CONN must be disabled before the TPS2583x-Q1 is disabled. In real application, customer can tie the EN of external 5-V LDO and EN of TPS2583x-Q1 together to meet the timing requirement.

Figure 10-14 V_CONN Source Using External LDO