8.3.1 Undervoltage Protection (UVP) and Undervoltage Lockout (UVLO)

All the TPS2595xx devices constantly monitor the input supply to ensure that the load is powered up only when the voltage is at a sufficient level. During the start-up condition, the device waits for the input supply to rise above a fixed threshold V_UVP before it proceeds to turn ON the FET. Similarly, during the ON condition, if the input supply falls below the UVP threshold, the FET is turned OFF. The UVP rising and falling thresholds are slightly different, thereby providing some hysteresis and ensuring stable operation around the threshold voltage.

The TPS2595x0, TPS2595x1, TPS2595x5 devices provide an user programmable UVLO mechanism to ensure that the load is powered up only when the voltage is at a sufficient level. This can be achieved by dividing the input supply and feeding it to the EN/UVLO pin. Whenever the voltage at the EN/UVLO pin falls below a threshold V_UVLO, the device turns OFF the FET. The FET is turned ON again when the voltage rises above the threshold. The rising and falling thresholds on this pin are slightly different, thereby providing some hysteresis and ensuring stable operation around the threshold voltage.

The user must choose the resistor divider values appropriately to map the desired input undervoltage level to the UVLO threshold of the part. See Figure 47.

Figure 47. Undervoltage Lockout

Equation 1.