For all applications, TI recommends a ceramic decoupling capacitor of 0.1 μF or greater between the IN terminal and GND terminal.

For all applications, TI recommends a ceramic decoupling capacitor of 2.2 μF or greater between the OUT terminal and GND terminal.

The optimal placement of the decoupling capacitor is closest to the IN and GND terminals of the device. Care must be taken to minimize the loop area formed by the bypass-capacitor connection, the IN terminal, and the GND terminal of the IC. See Figure below for a PCB layout example.

High current-carrying power-path connections must be as short as possible and must be sized to carry at least twice the full-load current.

The GND terminal must be tied to the PCB ground plane at the terminal of the IC. The PCB ground must be a copper plane or island on the board.

The IN and OUT pins are used for Heat Dissipation. Connect to as much copper area as possible with thermal vias.

• R_ILIM

• R_IMON

• R_IREF

• C_dVdT

• C_ITIMER

• C_IN

• C_OUT

• C_VDD

• Resistors for the EN/UVLO pin

Connect the other end of the component to the GND pin of the device with shortest trace length. The trace routing for the C_IN, C_OUT, C_VDD, R_IREF, R_ILIM, R_IMON, C_ITIMER and C_dVdt components to the device must be as short as possible to reduce parasitic effects on the current limit, overcurrent blanking interval and soft-start timing. These traces must not have any coupling to switching signals on the board.

Because the IMON, ILIM and IREF pins directly control the overcurrent protection behavior of the device, the PCB routing of these nodes must be kept away from any noisy (switching) signals.

TI recommends to keep the parasitic loading on SWEN pin to a minimum to avoid synchronization issues.

Protection devices such as TVS, snubbers, capacitors, or diodes must be placed physically close to the device they are intended to protect. These protection devices must be routed with short traces to reduce inductance. For example, TI recommends a protection Schottky diode to address negative transients due to switching of inductive loads, and it must be physically close to the OUT pins.